Irq Pin Digital Filter Setting Register 0 (Irqfltc0) - Renesas RX100 Series User Manual

RX13T Group
14.2.9

IRQ Pin Digital Filter Setting Register 0 (IRQFLTC0)

Address(es): ICU.IRQFLTC0 0008 7514h
b15 b14
— —
Value after reset: 0 0
Bit Symbol
b1, b0 FCLKSEL0[1:0]
b3, b2 FCLKSEL1[1:0]
b5, b4 FCLKSEL2[1:0]
b7, b6 FCLKSEL3[1:0]
b9, b8 FCLKSEL4[1:0]
b11, b10 FCLKSEL5[1:0]
b15 to b12 —
FCLKSELi[1:0] Bits (IRQi Digital Filter Sampling Clock) (i = 0 to 5)
These bits select the cycle of the digital filter sampling clock for the IRQi pin.
The sampling clock cycle can be selected from among the PCLK (every cycle), PCLK/8 (once every eight cycles),
PCLK/32 (once every 32 cycles), and PCLK/64 (once every 64 cycles).
For details of the digital filter, see section 14.4.7, Digital Filter .
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
b13 b12 b11 b10
— — FCLKSEL5[1:0] FCLKSEL4[1:0] FCLKSEL3[1:0] FCLKSEL2[1:0] FCLKSEL1[1:0] FCLKSEL0[1:0]
0 0 0 0
Bit Name
IRQ0 Digital Filter Sampling Clock
IRQ1 Digital Filter Sampling Clock
IRQ2 Digital Filter Sampling Clock
IRQ3 Digital Filter Sampling Clock
IRQ4 Digital Filter Sampling Clock
IRQ5 Digital Filter Sampling Clock
Reserved
b9 b8 b7 b6
0 0 0 0
Description
0 0: PCLK
0 1: PCLK/8
1 0: PCLK/32
1 1: PCLK/64
These bits are read as 0. The write value should be 0. R/W
14. Interrupt Controller (ICUb)
b5 b4 b3 b2
0 0 0 0
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b1 b0
0 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W