Basic Operation (With Channel-Dedicated Sample-And-Hold Circuits) - Renesas RX100 Series User Manual

RX13T Group
26.3.2.2

Basic Operation (With Channel-Dedicated Sample-and-Hold Circuits)

When a channel-dedicated sample-and-hold circuit is used, sample-and-hold operations are performed first, and this is
followed by A/D conversion once of the analog inputs on all selected channels. The ADSHCR.SHANS[2:0] bits are used
to select the channels for which the channel-dedicated sample-and-hold circuits are to be used.
(1) Analog input sampling of all channels for which the channel-dedicated sample-and-hold circuits are to be used is
started when the ADCSR.ADST bit is set to 1 (A/D conversion start) by software, or synchronous or asynchronous
trigger input.
(2) After sample-and-hold operation, A/D conversion is performed for ANn channels selected by the ADANSA0
register, starting from the channel with the smallest number n.
(3) Each time A/D conversion of a single channel is completed, the result of A/D conversion is stored in the
corresponding A/D data register (ADDRy).
(4) When A/D conversion of all the selected channels is completed, a scan end interrupt request is generated if the
ADCSR.ADIE bit is 1 (interrupt generation upon scanning completion enabled).
(5) The ADCSR.ADST bit remains 1 (A/D conversion start) during A/D conversion, and is automatically cleared to 0
when A/D conversion of all the selected channels is completed. Then the 12-bit A/D converter enters a waiting
state.
A/D conversion
started
ADST
Channel 0
(AN000)
Waiting for conversion
Channel 1
Waiting for conversion
(AN001)
Channel 2
Waiting for conversion
(AN002)
ADDR0
ADDR1
ADDR2
Scan end
interrupt
Note 1. indicates the instruction is executed by software.
Figure 26.3 Example of Operation in Single Scan Mode
(Channel-Dedicated Sample-and-Hold Circuits Used; AN000, AN001, AN002 Selected)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Sampling-and-holding and scanning performed once
*1
Set
(1)
Sample-and-hold time A/D conversion time
Sampling A/D conversion 1
Holding (2)
Sampling Holding
Sampling
Waiting for conversion
Waiting for conversion
A/D conversion 2
Holding A/D conversion 3
(3)
Stored
A/D conversion result 1
(3)
Stored
A/D conversion result 2
26. 12-Bit A/D Converter (S12ADF)
(5)
Waiting for conversion
Stored (3)
A/D conversion result 3
(4)
Interrupt generated
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