Renesas RX100 Series User Manual page 654

32-bit mcu
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RX13T Group
Start data reception
Set MPIE bit in SCR to 1.
No
Read ORER and FER flags in SSR.
FER flag = 1 or ORER flag = 1
Read receive data in RDR.
No
ID of receiving station itself?
No
Read ORER and FER flags in SSR.
FER flag = 1 or ORER flag = 1
Read receive data in RDR.
No
All data received?
Set RE and RIE bits in SCR to 0.
Figure 23.20
Example of Multi-Processor Serial Reception Flowchart (1)
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Initialization
RXI interrupt?
Yes
No
Yes
RXI interrupt?
Yes
No
Yes
End
23. Serial Communications Interface (SCIg, SCIh)
[ 1 ]
[ 1 ] SCI initialization:
Set data reception.
[ 2 ] ID reception cycle:
Set the MPIE bit in SCR to 1 and wait for ID
reception.
[ 2 ]
[ 3 ] SCI status confirmation and reception and
comparison of ID:
Read data in RDR at the first RXI interrupt, and
[ 3 ]
compare it with the ID of the receiving station itself.
If the ID does not match the ID of the receiving
station itself, set the MPIE bit to 1 again, and wait for
another RXI interrupt request.
[ 4 ] Data reception at an RXI interrupt:
Read data in RDR once in the RXI interrupt routine.
Yes
[5 ] Receive error processing and break detection:
If a receive error occurs, an error is identified by
reading the ORER and FER flags in SSR. After
performing the appropriate error processing, be sure
to set the ORER and FER flags to 0. Reception
cannot be resumed if any of these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the value of the RXDn pin.
[ 4 ]
Yes
[ 5 ]
Error processing
(Continued to next page)
Note:
The RDR register becomes the RDRH and RDRL
registers when 9-bit data length is selected. Read
data in the order from RDRH to RDRL.
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