Usage Example Of A/D Data Register Automatic Clearing Function; A/D-Converted Value Addition/Average Mode; Disconnection Detection Assist Function - Renesas RX100 Series User Manual

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26.3.6

Usage Example of A/D Data Register Automatic Clearing Function

Setting the ADCER.ACE bit to 1 automatically clears the A/D data registers (ADDRy, ADRD, ADOCDR, ADDBLDR,
ADDBLDRA, ADDBLDRB) to 0000h when the A/D data registers (ADDRy, ADRD, ADOCDR, ADDBLDR,
ADDBLDRA, ADDBLDRB) are read by the CPU or DTC.
This function enables detection of update failures of the A/D data registers (ADDRy, ADRD, ADOCDR, ADDBLDR,
ADDBLDRA, ADDBLDRB). The following describes the examples in which the function to automatically clear the
ADDRy register is enabled and disabled.
In a case where the ADCER.ACE bit is 0 (automatic clearing disabled), if the A/D conversion result (0222h) is not
written to the ADDRy register for some reason, the old data (0111h) will be the ADDRy value. Furthermore, if this
ADDRy value is read into a general register using an A/D scan end interrupt, the old data (0111h) can be saved in the
general register. When checking whether there is an update failure, it is necessary to frequently save the old data in the
RAM or a general register.
In a case where the ADCER.ACE bit is 1 (automatic clearing enabled), when ADDRy = 0111h is read by the CPU or
DTC, ADDRy is automatically cleared to 0000h. After that, if the A/D conversion result 0222h cannot be transferred to
ADDRy for some reason, the cleared data (0000h) remains as the ADDRy value. If this ADDRy value is read into a
general register using an A/D scan end interrupt at this point, 0000h will be saved in the general register.
Occurrence of an ADDRy update failure can be determined by simply checking that the read data value is 0000h.
26.3.7

A/D-Converted Value Addition/Average Mode

In A/D-converted value addition mode, the same channel is A/D-converted 2, 3, 4, or 16 consecutive times and the sum
of the converted values is stored in the data register. In A/D-converted value average mode, the same channel is A/D-
converted two or four consecutive times and the mean of the converted values is stored in the data register. The use of the
average of these results can improve the accuracy of A/D conversion, depending on the types of noise components that
are present. This function, however, cannot always guarantee an improvement in A/D conversion accuracy.
The A/D-converted value addition/average mode can be used when A/D conversion of the channel select analog input or
internal reference voltage is selected.
26.3.8

Disconnection Detection Assist Function

This converter incorporates the function to fix the charge for sampling capacitance to the specified state before start of A/
D conversion. This function enables disconnection detection in wiring of analog inputs. The disconnection detection
assist function should be used while ADPGACR.PnENAMP = 0 (does not use the amplifier in the PGA) and
ADSHCR.SHANS = 0 (bypass the sample-and-hold circuits).
Figure 26.28 illustrates the A/D conversion operation when the disconnection detection assist function is used. Figure
26.29 shows an example of disconnection detection when precharge is selected. Figure 26.30 shows an example of
disconnection detection when discharge is selected.
ADST
AD
conversion
operation
Disconnection detection assist time (0 to 15 cycles of ADCLK)
Figure 26.28
Operation of A/D Conversion When the Disconnection Detection Assist Function is Used
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Sampling time
Conversion time
Disconnection detection assist time (0 to 15 cycles of ADCLK)
26. 12-Bit A/D Converter (S12ADF)
Sampling time
Conversion time
Page 875 of 1041

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