Renesas RX100 Series User Manual page 57

RX13T Group
Table 2.6 16-Bit Read Operations when Big Endian has been Selected
Operation
Reading
Address a 16-bit unit from
of src address 0
Address 0 Transfer to LH
Address 1 Transfer to LL
Address 2 —
Address 3 —
Address 4 —
Address 5 —
Address 6 —
Address 7 —
Table 2.7 16-Bit Write Operations when Little Endian has been Selected
Operation
Writing
Address a 16-bit unit to
of dest address 0
Address 0 Transfer from LL
Address 1 Transfer from LH
Address 2 —
Address 3 —
Address 4 —
Address 5 —
Address 6 —
Address 7 —
Table 2.8 16-Bit Write Operations when Big Endian has been Selected
Operation
Writing
Address a 16-bit unit to
of dest address 0
Address 0 Transfer from LL
Address 1 Transfer from LH
Address 2 —
Address 3 —
Address 4 —
Address 5 —
Address 6 —
Address 7 —
Table 2.9 8-Bit Read Operations when Little Endian has been Selected
Operation
Reading an 8-bit unit from
Address of src address 0
Address 0
Address 1
Address 2
Address 3
R01UH0822EJ0100 Rev.1.00
Jul 31, 2019
Reading Reading
a 16-bit unit from a 16-bit unit from
address 1 address 2
— —
Transfer to LH —
Transfer to LL Transfer to LH
— Transfer to LL
— —
— —
— —
— —
Writing Writing
a 16-bit unit to a 16-bit unit to
address 1 address 2
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
— —
— —
— —
— —
Writing Writing
a 16-bit unit to a 16-bit unit to
address 1 address 2
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
— —
— —
— —
— —
Reading an 8-bit unit from
address 1
Transfer to LL
— Transfer to LL
—
—
Reading Reading
a 16-bit unit from a 16-bit unit from
address 3 address 4
— —
— —
— —
Transfer to LH —
Transfer to LL Transfer to LH
— Transfer to LL
— —
— —
Writing Writing
a 16-bit unit to a 16-bit unit to
address 3 address 4
— —
— —
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
— —
— —
Writing Writing
a 16-bit unit to a 16-bit unit to
address 3 address 4
— —
— —
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
— —
— —
Reading an 8-bit unit from
address 2
— —
—
— Transfer to LL
— —
2. CPU
Reading Reading
a 16-bit unit from a 16-bit unit from
address 5 address 6
— —
— —
— —
— —
— —
Transfer to LH —
Transfer to LL Transfer to LH
— Transfer to LL
Writing Writing
a 16-bit unit to a 16-bit unit to
address 5 address 6
— —
— —
— —
— —
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
Writing Writing
a 16-bit unit to a 16-bit unit to
address 5 address 6
— —
— —
— —
— —
— —
Transfer from LL —
Transfer from LH Transfer from LL
— Transfer from LH
Reading an 8-bit unit from
address 3
—
—
—
Transfer to LL
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