Oscillation Stabilization Time Select Register (Osts) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

5.3.5 Oscillation stabilization time select register (OSTS)

This register is used to select the X1 clock oscillation stabilization wait time when the STOP mode is released.
When the X1 clock is selected as the CPU clock, the operation automatically waits for the time set using the OSTS
register after the STOP mode is released.
When the CPU clock is switched from the high-speed on-chip oscillator clock to the X1 clock, or when STOP mode is
entered while the high-speed on-chip oscillator is used as the CPU clock and the X1 clock is also oscillating, and then
STOP mode is released. The oscillation stabilization time can be checked up to the time set using the OSTC register.
The OSTS register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets the OSTS register to 07H.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
CHAPTER 5 CLOCK GENERATOR
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