Internal Data Memory Space; Special Function Register (Sfr) Area; Extended Special Function Register (2Nd Sfr: 2Nd Special Function Register) Area - Renesas RL78/G1P Hardware User Manual

RL78/G1P

3.1.3 Internal data memory space

The RL78/G1P products incorporate the following RAMs.
RL78/G1P
The internal RAM can be used as a data area and a program area where instructions are fetched (it is prohibited to use
the general-purpose register area for fetching instructions). Four general-purpose register banks consisting of eight 8-bit
registers per bank are assigned to the 32-byte area of FFEE0H to FFEFFH of the internal RAM area.
The internal RAM is used as stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
instructions or as a stack area.
2. When self-programming is performed or the data flash memory is rewritten, the stack used for
each library and the RAM address used for the data buffer and DMA transfer should not be set to
the RAM area of the following products. For details, refer to RL78 Family Flash Self-Programming
Library Type 01 User's Manual and RL78 Family Data Flash Library Type 04 User's Manual.
RL78/G1P: FFE20H to FFEFFH
3. The flash libraries use the parts of the RAM area referred to as self RAM in self-programming or
rewriting of the data flash memory. For the sizes of the RAM areas used by the flash libraries, see
"ROM, RAM capacities" in 1.1 Features.

3.1.4 Special function register (SFR) area

On-chip peripheral hardware special function registers (SFRs) are allocated in the area FFF00H to FFFFFH (see Table
3-5 in 3.2.4 Special function registers (SFRs)).
Caution Do not access addresses to which SFRs are not assigned.

3.1.5 Extended special function register (2nd SFR: 2nd Special Function Register) area

On-chip peripheral hardware special function registers (2nd SFRs) are allocated in the area F0000H to F07FFH (see
Table 3-6 in 3.2.5 Extended Special function registers (2nd SFRs: 2nd Special Function Registers)).
SFRs other than those in the SFR area (FFF00H to FFFFFH) are allocated to this area. An instruction that accesses
the extended SFR area, however, is 1 byte longer than an instruction that accesses the SFR area.
Caution Do not access addresses to which extended SFRs are not assigned.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 3-4. Internal RAM Capacity
Part Number
CHAPTER 3 CPU ARCHITECTURE
Internal RAM
1536  8 bits (FF900H to FFEFFH)
33