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M16C/29
Renesas M16C/29 Manuals
Manuals and User Guides for Renesas M16C/29. We have
3
Renesas M16C/29 manuals available for free PDF download: User Manual, Hardware Manual, Quick Start Manual
Renesas M16C/29 User Manual (501 pages)
Brand:
Renesas
| Category:
Microcontrollers
| Size: 4.06 MB
Table of Contents
Table of Contents
11
Resets
61
Hardware Reset
61
Hardware Reset 1
61
Brown-Out Detection Reset (Hardware Reset 2)
61
Software Reset
62
Watchdog Timer Reset
62
Oscillation Stop Detection Reset
62
Voltage Detection Circuit
64
Low Voltage Detection Interrupt
67
Limitations on Stop Mode
69
Limitations on WAIT Instruction
69
Processor Mode
70
Clock Generation Circuit
73
Main Clock
80
Sub Clock
81
On-Chip Oscillator Clock
82
PLL Clock
82
CPU Clock and Peripheral Function Clock
84
CPU Clock
84
Peripheral Function Clock(F 1SIO 2SIO 8SIO 32SIO AD CAN0 )
84
Clockoutput Function
84
Power Control
85
Normal Operation Mode
85
Wait Mode
86
Stop Mode
88
System Clock Protective Function
92
Oscillation Stop and Re-Oscillation Detect Function
92
Operation When CM27 Bit = 0 (Oscillation Stop Detection Reset)
93
Operation When CM27 Bit = 1 (Oscillation Stop and Re-Oscillation Detect Interrupt)
93
How to Use Oscillation Stop and Re-Oscillation Detect Function
94
Protection
95
Interrupts
96
Type of Interrupts
96
Software Interrupts
97
Hardware Interrupts
98
Interrupts and Interrupt Vector
99
Fixed Vector Tables
99
Relocatable Vector Tables
100
Interrupt Control
101
I Flag
104
IR Bit
104
ILVL2 to ILVL0 Bits and IPL
104
Interrupt Sequence
105
Interrupt Response Time
106
Variation of IPL When Interrupt Request Is Accepted
106
Saving Registers
107
Returning from an Interrupt Routine
109
Interrupt Priority
109
Interrupt Priority Resolution Circuit
109
INT Interrupt
111
NMI Interrupt
112
Key Input Interrupt
112
CAN0 Wake-Up Interrupt
113
Address Match Interrupt
113
Watchdog Timer
115
Count Source Protective Mode
116
Dmac
117
Transfer Cycles
122
Effect of Source and Destination Addresses
122
Effect of Software Wait
122
DMA Transfer Cycles
124
DMA Enable
125
DMA Request
125
Channel Priority and DMA Transfer Timing
126
Timers
127
Timer a
129
Timer Mode
132
Event Counter Mode
133
One-Shot Timer Mode
138
Pulse Width Modulation (PWM) Mode
140
Timer B
143
Timer Mode
145
Event Counter Mode
146
Pulse Period and Pulse Width Measurement Mode
147
A/D Trigger Mode
149
Three-Phase Motor Control Timer Function
151
Position-Data-Retain Function
162
Three-Phase/Port Output Switch Function
164
Timer S
166
Base Timer
177
Base Timer Reset Register(G1BTRR)
181
Interrupt Operation
182
DMA Support
182
Time Measurement Function
183
Waveform Generating Function
187
Single-Phase Waveform Output Mode
188
Phase-Delayed Waveform Output Mode
190
Set/Reset Waveform Output (SR Waveform Output) Mode
192
I/O Port Function Select
194
INPC17 Alternate Input Pin Selection
195
Digital Debounce Function for Pin P17/INT5/INPC17
195
Serial I/O
196
Uarti (I=0 to 2)
196
Clock Synchronous Serial I/O Mode
206
Clock Asynchronous Serial I/O (UART) Mode
214
Special Mode 1 (I 2 C Bus Mode)(UART2)
222
Special Mode 2 (UART2)
232
Special Mode 3 (Iebus Mode)(UART2)
236
Special Mode 4 (SIM Mode) (UART2)
238
O3 and SI/O4
243
CLK Polarity Selection
246
Oi Operation Timing
246
Functions for Setting an Souti Initial Value
247
A/D Converter
248
Operating Modes
254
One-Shot Mode
254
Repeat Mode
256
Single Sweep Mode
258
Repeat Sweep Mode 0
260
Repeat Sweep Mode 1
262
Simultaneous Sample Sweep Mode
264
Delayed Trigger Mode 0
267
Delayed Trigger Mode 1
273
Resolution Select Function
279
Sample and Hold
279
Power Consumption Reducing Function
279
Output Impedance of Sensor under A/D Conversion
280
Multi-Master I C Bus Interface
282
I 2 C0 Data Shift Register (S00 Register)
290
I 2 C0 Address Register (S0D0 Register)
290
I 2 C0 Clock Control Register (S20 Register)
291
Bits 0 to 4: SCL Frequency Control Bits (CCR0-CCR4)
291
Bit 5: SCL Mode Specification Bit (FAST MODE)
291
Bit 6: ACK Bit (ACKBIT)
291
Bit 7: ACK Clock Bit (ACK-CLK)
291
I 2 C0 Control Register 0 (S1D0)
293
Bits 0 to 2: Bit Counter (BC0-BC2)
293
Bit 3: I C Interface Enable Bit (ES0)
293
Bit 4: Data Format Select Bit (ALS)
293
Bit 6: I C Bus Interface Reset Bit (IHR)
293
Bit 7: I 2 C Bus Interface Pin Input Level Select Bit (TISS)
294
I 2 C0 Status Register (S10 Register)
295
Bit 0: Last Receive Bit (LRB)
295
Bit 1: General Call Detection Flag (ADR0)
295
Bit 2: Slave Address Comparison Flag (AAS)
295
Bit 3: Arbitration Lost Detection Flag (AL)
295
Bit 4: I C Bus Interface Interrupt Request Bit (PIN)
296
Bit 5: Bus Busy Flag (BB)
296
Bit 6: Communication Mode Select Bit (Transfer Direction Select Bit: TRX)
297
Bit 7: Communication Mode Select Bit (Master/Slave Select Bit: MST)
297
I 2 C0 Control Register 1 (S3D0 Register)
298
Bit 0 : Interrupt Enable Bit by STOP Condition (SIM )
298
Bit 1: Interrupt Enable Bit at the Completion of Data Receive (WIT)
298
Bits 2,3 : Port Function Select Bits PED, PEC
299
Bits 4,5 : SDA/SCL Logic Output Value Monitor Bits SDAM/SCLM
300
Bits 6,7 : I C System Clock Select Bits ICK0, ICK1
300
Address Receive in STOP/WAIT Mode
300
I 2 C0 Control Register 2 (S4D0 Register)
301
Bit0: Time-Out Detection Function Enable Bit (TOE)
302
Bit1: Time-Out Detection Flag (TOF )
302
Bit2: Time-Out Detection Period Select Bit (TOSEL)
302
Bits 3,4,5: I 2 C System Clock Select Bits (ICK2-4)
302
Bit7: STOP Condition Detection Interrupt Request Bit (SCPIN)
302
I 2 C0 START/STOP Condition Control Register (S2D0 Register)
303
Bit0-Bit4: START/STOP Condition Setting Bits (SSC0-SSC4)
303
Bit5: SCL/SDA Interrupt Pin Polarity Select Bit (SIP)
303
Bit6 : SCL/SDA Interrupt Pin Select Bit (SIS)
303
Bit7: START/STOP Condition Generation Select Bit (STSPSEL)
303
START Condition Generation Method
304
START Condition Duplicate Protect Function
305
STOP Condition Generation Method
305
START/STOP Condition Detect Operation
307
Address Data Communication
308
Example of Master Transmit
308
Example of Slave Receive
309
Precautions
310
CAN Module
313
CAN Module-Related Registers
314
CAN0 Message Box
315
Acceptance Mask Registers
317
CAN SFR Registers
318
Operating Modes
326
CAN Reset/Initialization Mode
326
CAN Operating Mode
327
CAN Sleep Mode
327
CAN Interface Sleep Mode
328
Bus off State
328
Configuration of the CAN Module System Clock
329
Bit Timing Configuration
329
Bit-Rate
330
Acceptance Filtering Function and Masking Function
331
Acceptance Filter Support Unit (ASU)
332
Basiccan Mode
333
Return from Bus off Function
334
Time Stamp Counter and Time Stamp Function
334
Listen-Only Mode
334
Reception and Transmission
335
Reception
336
Transmission
337
CAN Interrupts
338
CRC Calculation Circuit
339
CRC Snoop
339
Programmable I/O Ports
342
Port Pi Direction Register (Pdi Register, I = 0 to 3, 6 to 10)
342
Port Pi Register (Pi Register, I = 0 to 3, 6 to 10)
342
Pull-Up Control Register 0 to 2 (PUR0 to PUR2 Registers)
342
Port Control Register (PCR Register)
342
Pin Assignment Control Register (PACR)
343
Digital Debounce Function
343
Flash Memory Version
356
Flash Memory Performance
356
Boot Mode
357
Memory Map
358
Functions to Prevent Flash Memory from Rewriting
361
ROM Code Protect Function
361
ID Code Check Function
361
CPU Rewrite Mode
363
EW Mode 0
364
EW Mode 1
364
Register Description
365
Flash Memory Control Register 0 (FMR0)
365
Flash Memory Control Register 1 (FMR1)
366
Flash Memory Control Register 4 (FMR4)
366
Precautions in CPU Rewrite Mode
371
Operation Speed
371
Prohibited Instructions
371
Interrupts
371
How to Access
371
Writing in the User ROM Area
371
DMA Transfer
372
Writing Command and Data
372
Wait Mode
372
Stop Mode
372
Low Power Consumption Mode and On-Chip Oscillator-Low Power Consumption Mode
372
Software Commands
373
Read Array Command (FF )
373
Read Status Register Command (70 )
373
Clear Status Register Command (50 )
373
Program Command (40 )
374
Block Erase
375
Status Register
377
Sequence Status (SR7 and FMR00 Bits )
377
Erase Status (SR5 and FMR07 Bits)
377
Program Status (SR4 and FMR06 Bits)
377
Full Status Check
378
Standard Serial I/O Mode
380
ID Code Check Function
380
Example of Circuit Application in Standard Serial I/O Mode
384
Parallel I/O Mode
386
ROM Code Protect Function
386
CAN I/O Mode
387
ID Code Check Function
387
Example of Circuit Application in CAN I/O Mode
391
Electrical Characteristics
392
Normal Version
392
T Version
413
Version
434
Usage Notes
447
Sfrs
447
For 80-Pin Package
447
For 64-Pin Package
447
Register Setting
447
Clock Generation Circuit
448
PLL Frequency Synthesizer
448
Power Control
449
Protection
451
Interrupts
452
Reading Address 00000
452
Setting the SP
452
NMI Interrupt
452
Changing the Interrupt Generate Factor
452
INT Interrupt
453
Rewrite the Interrupt Control Register
454
Watchdog Timer Interrupt
454
Dmac
455
Write to DMAE Bit in Dmicon Register
455
Timers
456
Timer a
456
Timer B
459
Three-Phase Motor Control Timer Function
460
Timer S
461
Rewrite the G1IR Register
461
Rewrite the Icociic Register
462
Waveform Generating Function
462
IC/OC Base Timer Interrupt
462
Serial I/O
463
Clock-Synchronous Serial I/O
463
UART Mode
464
O3, Si/O4
464
A/D Converter
465
Multi-Master I 2 C Bus Interface
467
Writing to the S00 Register
467
AL Flag
467
CAN Module
468
Reading C0STR Register
468
CAN Transceiver in Boot Mode
470
Programmable I/O Ports
471
Electric Characteristic Differences between Mask ROM
472
Mask ROM Version
473
Internal ROM Area
473
Reserved Bit
473
Flash Memory Version
474
Functions to Inhibit Rewriting Flash Memory Rewrite
474
Stop Mode
474
Wait Mode
474
Low Powerdissipation Mode, On-Chip Oscillator Low Power Dissipation Mode
474
Writing Command and Data
474
Program Command
474
Operation Speed
474
Instructions Inhibited against Use
474
Interrupts
475
How to Access
475
Writing in the User ROM Area
475
DMA Transfer
475
Regarding Programming/Erasure Times and Execution Time
475
Definition of Programming/Erasure Times
476
Flash Memory Version Electrical Characteristics 10,000 E/W Cycle Products
476
Normal: U7, U9; T-Ver./V-Ver.: U7)
476
Boot Mode
476
Noise
477
Instruction for a Device Use
478
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Renesas M16C/29 Hardware Manual (468 pages)
16-BIT SINGLE-CHIP MICROCOMPUTER
Brand:
Renesas
| Category:
Computer Hardware
| Size: 4.29 MB
Table of Contents
Table of Contents
6
Software Reset
49
Watchdog Timer Reset
49
Oscillation Stop Detection Reset
49
Voltage Detection Circuit
51
Voltage down Detection Interrupt
54
Limitations on Exiting Stop Mode
56
Limitations on Exiting Wait Mode
56
Processor Mode
57
Clock Generation Circuit
58
Main Clock
65
Sub Clock
66
On-Chip Oscillator Clock
67
PLL Clock
67
CPU Clock and Peripheral Function Clock
69
CPU Clock
69
Peripheral Function Clock(F1, F2, F8, F32, F1Sio, F2Sio, F8Sio, F32Sio, Fad, Fc32, Fcan0)
69
Clockoutput Function
69
Power Control
70
Normal Operation Mode
70
High-Speed Mode
70
Low Power Dissipation Mode
70
Low-Speed Mode
70
Medium-Speed Mode
70
PLL Operation Mode
70
On-Chip Oscillator Low Power Dissipation Mode
71
On-Chip Oscillator Mode
71
Wait Mode
71
Entering Wait Mode
71
Peripheral Function Clock Stop Function
71
Exiting Wait Mode
72
Pin Status During Wait Mode
72
Stop Mode
73
Entering Stop Mode
73
Exiting Stop Mode
73
Pin Status During Stop Mode
73
System Clock Protective Function
77
Oscillation Stop and Re-Oscillation Detect Function
77
Operation When CM27 Bit = 0 (Oscillation Stop Detection Reset)
78
Operation When CM27 Bit = 1 (Oscillation Stop and Re-Oscillation Detect Interrupt)
78
How to Use Oscillation Stop and Re-Oscillation Detect Function
79
Protection
80
Interrupts
81
Type of Interrupts
81
Software Interrupts
82
BRK Interrupt
82
INT Instruction Interrupt
82
Overflow Interrupt
82
Undefined Instruction Interrupt
82
Hardware Interrupts
83
Address Match Interrupt
83
DBC Interrupt
83
NMI Interrupt
83
Oscillation Stop and Re-Oscillation Detection Interrupt
83
Peripheral Function Interrupts
83
Single-Step Interrupt
83
Special Interrupts
83
Voltage down Detection Interrupt
83
Watchdog Timer Interrupt
83
Interrupts and Interrupt Vector
84
Fixed Vector Tables
84
Relocatable Vector Tables
85
Interrupt Control
86
I Flag
89
IR Bit
89
ILVL2 to ILVL0 Bits and IPL
89
Interrupt Sequence
90
Interrupt Response Time
91
Variation of IPL When Interrupt Request Is Accepted
91
Saving Registers
92
Returning from an Interrupt Routine
94
Interrupt Priority
94
Interrupt Priority Resolution Circuit
94
INT Interrupt
96
NMI Interrupt
96
Key Input Interrupt
97
CAN0 Wake-Up Interrupt
97
Address Match Interrupt
98
Watchdog Timer
100
Count Source Protective Mode
100
Cold Start / Warm Start
102
Dmac
103
Transfer Cycles
108
Effect of Source and Destination Addresses
108
Effect of Software Wait
108
DMA Transfer Cycles
110
DMA Enable
111
DMA Request
111
Channel Priority and DMA Transfer Timing
112
Timers
113
Timer a
115
Timer Mode
118
Event Counter Mode
119
Counter Initialization by Two-Phase Pulse Signal Processing
123
One-Shot Timer Mode
124
Pulse Width Modulation (PWM) Mode
126
Timer B
129
Timer Mode
131
Event Counter Mode
132
Pulse Period and Pulse Width Measurement Mode
133
A/D Trigger Mode
135
Three-Phase Motor Control Timer Function
137
Position-Data-Retain Function
148
Operation of the Position-Data-Retain Function
148
Position-Data-Retain Function Control Register
149
Retain-Trigger Polarity Select Bit (PDRT)
149
U-Phase Position Data Retain Bit (PDRU)
149
V-Phase Position Data Retain Bit (PDRV)
149
W-Phase Position Data Retain Bit (PDRW)
149
Three-Phase/Port Output Switch Function
150
Timer S (Input Capture/Output Compare)
152
Base Timer
164
Base Timer Reset Register
168
Interrupt Operation
169
DMA Support
169
Time Measurement Function
170
Waveform Generation Function
174
Single-Phase Waveform Output Mode
175
Phase-Delayed Waveform Output Mode
177
Set/Reset Waveform Output (SR Waveform Output) Mode
179
I/O Port Function Select
181
INPC17 Alternate Input Pin Selection
182
Digital Debounce Function for Pin P17/INT5/INPC17
182
Serial I/O
183
Uarti (I=0 to 2)
183
Clock Synchronous Serial I/O Mode
193
CLK Polarity Select Function
197
LSB First/Msb First Select Function
197
Continuous Receive Mode
198
Serial Data Logic Switch Function (UART2)
198
Transfer Clock Output from Multiple Pins Function (UART1)
198
CTS/RTS Separate Function (UART0)
199
Clock Asynchronous Serial I/O (UART) Mode
200
LSB First/Msb First Select Function
204
Serial Data Logic Switching Function (UART2)
205
Txd and Rxd I/O Polarity Inverse Function (UART2)
205
CTS/RTS Separate Function (UART0)
206
Special Mode 1 (I 2 C Bus Mode)(UART2)
207
Detection of Start and Stop Condition
213
Output of Start and Stop Condition
213
Arbitration
214
SDA Input
215
SDA Output
215
Transfer Clock
215
ACK and NACK
216
Initialization of Transmission/Reception
216
Special Mode 2 (UART2)
217
Clock Phase Setting Function
220
Master (Internal Clock)
220
Slave (External Clock)
220
Special Mode 3 (Iebus Mode)(UART2)
222
Special Mode 4 (SIM Mode) (UART2)
224
Parity Error Signal Output
227
Format
228
O3 and SI/O4
229
Oi Operation Timing
232
CLK Polarity Selection
232
Functions for Setting an Souti Initial Value
233
A/D Converter
234
Operation Modes
240
One-Shot Mode
240
Repeat Mode
242
Single Sweep Mode
244
Repeat Sweep Mode 0
246
Repeat Sweep Mode 1
248
Simultaneous Sample Sweep Mode
250
Delayed Trigger Mode 0
253
Delayed Trigger Mode 1
259
Resolution Select Function
265
Sample and Hold
265
Current Consumption Reducing Function
265
Analog Input Pin and External Sensor Equivalent Circuit Example
265
Precautions of Using A/D Converter
266
Multi-Master I C Bus Interface
267
I 2 C0 Data Shift Register (S00 Register)
276
I2C0 Address Register (S0D0 Register)
276
I 2 C0 Clock Control Register (S20 Register)
277
Bits 0 to 4: SCL Frequency Control Bits (CCR0-CCR4)
277
Bit 5: SCL Mode Specification Bit (FAST MODE)
277
Bit 6: ACK Bit (ACK BIT)
277
Bit 7: ACK Clock Bit (ACK)
277
I 2 C0 Control Register 0 (S1D0 Register)
279
Bits 0 to 2: Bit Counter (BC0-BC2)
279
Bit 3: I2C Interface Enable Bit (ES0)
279
Bit 4: Data Format Select Bit (ALS)
279
Bit 6: I C Bus Interface Reset Bit (IHR)
279
Bit 7: I
280
Bus Interface Pin Input Level Select Bit (TISS)
280
I 2 C0 Status Register (S10 Register)
281
Bit 0: Last Receive Bit (LRB)
281
Bit 1: General Call Detection Flag (ADR0)
281
Bit 2: Slave Address Comparison Flag (AAS)
281
Bit 3: Arbitration Lost Detection Flag (AL)(Note 1)
281
Bit 4: I C Bus Interface Interrupt Request Bit (PIN)
282
Bit 5: Bus Busy Flag (BB)
282
Bit 6: Communication Mode Select Bit (Transfer Direction Select Bit: TRX)
283
Bit 7: Communication Mode Select Bit (Master/Slave Select Bit: MST)
283
I 2 C0 Control Register 1 (S3D0 Register)
284
Bit 0 : Interrupt Enable Bit by STOP Condition (SIM )
284
Bit 1: Interrupt Enable Bit at the Completion of Data Receive (WIT)
284
Bits 2,3 : Port Function Select Bits PED, PEC
285
Bits 4,5 : SDA/SCL Logic Output Value Monitor Bits SDAM/SCLM
286
Bits 6,7 : I C System Clock Select Bits ICK0, ICK1
286
The Address Receive in STOP Mode/Wait Mode
286
I 2 C0 Control Register 2 (S3D0 Register)
287
Bit0: Time out Detection Function Enable Bit (TOE)
288
Bit1: Time out Detection Flag (TOF )
288
Bit2: Time out Detection Period Select Bit (TOSEL)
288
Bits 3,4,5: I 2 C System Clock Select Bits (ICK2-4)
288
Bit7: STOP Condition Detection Interrupt Request Bit (SCPIN)
288
I 2 C0 START/STOP Condition Control Registers (S2D0 Register)
289
Bit0-Bit4: START/STOP Condition Setting Bits (SSC0-SSC4)
289
Bit5: SCL/SDA Interrupt Pin Polarity Select Bit (SIP)
289
Bit6 : SCL/SDA Interrupt Pin Select Bit (SIS)
289
Bit7: START/STOP Condition Generation Select Bit (STSPSEL)
289
START Condition Generation Method
290
START Condition Duplicate Protect Function
291
STOP Condition Generation Method
291
START/STOP Condition Detect Operation
293
Address Data Communication
294
Example of Master Transmit
294
Example of Slave Receive
295
Usage Precautions
297
CAN Module
300
CAN Module-Related Registers
301
CAN0 Message Box
302
Acceptance Mask Registers
304
CAN SFR Registers
305
C0Mctlj Register (J = 0 to 15)
305
C0CTLR Register
306
C0STR Register
307
C0SSTR Register
308
C0ICR Register
309
C0IDR Register
309
C0CONR Register
310
C0RECR Register
311
C0TECR Register
311
C0AFS Register
312
C0TSR Register
312
Operational Modes
313
CAN Reset/Initialization Mode
313
CAN Operation Mode
314
CAN Sleep Mode
314
CAN Interface Sleep Mode
315
Bus off State
315
Configuration of the CAN Module System Clock
316
Bit Timing Configuration
316
Bit-Rate
317
Acceptance Filtering Function and Masking Function
318
Acceptance Filter Support Unit (ASU)
319
Basic CAN Mode
320
Return from Bus off Function
321
Time Stamp Counter and Time Stamp Function
321
Listen-Only Mode
321
Reception and Transmission
322
Reception
323
Transmission
324
CAN Interrupt
325
CRC Calculation Circuit
326
CRC Snoop
326
Programmable I/O Ports
329
Port Pi Direction Register (Pdi Register, I = 0 to 3, 6 to 10)
329
Port Pi Register (Pi Register, I = 0 to 3, 6 to 10)
329
Pull-Up Control Register 0 to Pull-Up Control Register 2 (PUR0 to PUR2 Registers)
329
Port Control Register
329
Pin Assignment Control Register (PACR)
330
Digital Debounce Function
330
Electrical Characteristics
343
Normal Version
343
T Version
364
Flash Memory Version
385
Flash Memory Performance
385
Memory Map
387
Functions to Prevent Flash Memory from Rewriting
390
ROM Code Protect Function
390
ID Code Check Function
390
CPU Rewrite Mode
392
EW0 Mode
393
EW1 Mode
393
Register Description
394
Flash Memory Control Register 0 (FMR0)
394
FMR 00 Bit
394
FMR01 Bit
394
FMR02 Bit
394
FMR06 Bit
394
FMR07 Bit
394
FMSTP Bit
394
Flash Memory Control Register 1 (FMR1)
395
FMR11 Bit
395
FMR16 Bit
395
FMR17 Bit
395
Flash Memory Control Register 4 (FMR4)
395
FMR40 Bit
395
FMR41 Bit
395
FMR46 Bit
395
Precautions in CPU Rewrite Mode
400
Operation Speed
400
Prohibited Instructions
400
Interrupts
400
How to Access
400
Writing in the User ROM Space
400
EW0 Mode
400
EW1 Mode
400
DMA Transfer
401
Writing Command and Data
401
Wait Mode
401
Stop Mode
401
Low Power Consumption Mode and On-Chip Oscillator-Low Power Consumption Mode
401
Software Commands
402
Read Array Command (FF )
402
Read Status Register Command
402
Clear Status Register Command
403
Program Command
403
Block Erase
404
Status Register
406
Sequence Status (SR7 and FMR00 Bits )
406
Erase Status (SR5 and FMR07 Bits)
406
Program Status (SR4 and FMR06 Bits)
406
Full Status Check
407
Standard Serial I/O Mode
409
ID Code Check Function
409
Example of Circuit Application in Standard Serial I/O Mode
413
Parallel I/O Mode
415
ROM Code Protect Function
415
CAN I/O Mode
416
ID Code Check Function
416
Example of Circuit Application in CAN I/O Mode
419
Package
420
Register Index
421
Renesas M16C/29 Quick Start Manual (4 pages)
Renesas Starter Kit Quick Start Guide
Brand:
Renesas
| Category:
Computer Hardware
| Size: 0.14 MB
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