Clock; Normal Operating Mode - Renesas M16C/64A Series User Manual

M16C/64A Group
9.3

Clock

The amount of current consumption correlates with the number of operating clocks and frequency. When
there are fewer operating clocks and a lower frequency, current consumption will be low.
Normal operating mode, wait mode, and stop mode can be used to control power consumption. All mode
states, except wait mode and stop mode, are referred to as normal operating mode in this document.
9.3.1

Normal Operating Mode

In normal operating mode, because both the CPU clock and the peripheral function clocks are
supplied, the CPU and the peripheral functions are operating. Power control is exercised by
controlling the CPU clock frequency. The higher the CPU clock frequency, the higher the processing
capability. The lower the CPU clock frequency, the lower the power consumption in the chip. If
unnecessary oscillator are stopped, power consumption is further reduced.
9.3.1.1 High-Speed Mode and Medium-Speed Mode
In high-speed mode, the main clock divided by 1 (no division) is used as the CPU clock.
In medium-speed mode, the main clock divided by 2, 4, 8 or 16 is used as the CPU clock.
f1 with the same frequency of the main clock divided by 1 is used as the peripheral function clocks in
both high-speed and medium-speed modes. When fC is supplied, fC and fC32 can be used as the
peripheral function clocks. When fOCO-S is supplied, it can be used as the peripheral function
clocks.
9.3.1.2 PLL Operating Mode
The PLL clock divided by 1 (no division), 2, 4, 8 or 16 is used as the CPU clock. f1 with the same
frequency of the PLL clock divided by 1 (no division) is used as the peripheral function clocks.
When fC is supplied, fC and fC32 can be used as the peripheral function clocks. When fOCO-S is
supplied, it can be used as the peripheral function clocks.
PLL operating mode can be entered and exited from medium-speed mode. To enter other modes
including wait mode and stop mode, enter medium-speed mode first, and then enter the intended
mode. Refer to Figure 9.1 "Clock Mode Transition" for details.
R01UH0136EJ0210 Rev.2.10
Jul 31, 2012
9. Power Control
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