Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1285

Mailbox Direction 2 Register
The register selects the data transfer direction for mailboxes 16 (bit 0) through 23 (bit 7). Each bit in this
CAN_MD2
register selects receive mode or transmit mode for the corresponding mailbox. For all bits, set the bit (=1) for receive
mode from the mailbox, and clear the bit (=0) for transmit mode to the mailbox. Bits 8 through 15 are read-only, as
the corresponding mailboxes (24 through 31) are transmit-only mailboxes.
Figure 25-45: CAN_MD2 Register Diagram
Table 25-40: CAN_MD2 Register Fields
Bit No.
(Access)
7:0 MB
(R/W)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
15 14 13 12
0 0 0
MB (R/W)
Mailbox n Transmit/Receive
Bit Name
Mailbox n Transmit/Receive.
11 10 9 8 7 6 5
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x CAN Register Descriptions
4 3 2 1 0
0 0 0 0 0
25–69