Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1284

ADSP-SC58x CAN Register Descriptions
Mailbox Direction 1 Register
The register selects the data transfer direction for mailboxes 0 through 15. Each bit in this register selects
CAN_MD1
receive mode or transmit mode for the corresponding mailbox. For all bits, set the bit (=1) for receive mode from the
mailbox, and clear the bit (=0) for transmit mode to the mailbox. Bits 0 through 7 are read-only, as the correspond-
ing mailboxes are receive-only mailboxes.
Figure 25-44: CAN_MD1 Register Diagram
Table 25-39: CAN_MD1 Register Fields
Bit No.
(Access)
15:8 MB
(R/W)
25–68
15 14 13 12
0 0 0
MB (R/W)
Mailbox n Transmit/Receive
Bit Name
Mailbox n Transmit/Receive.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
11 10 9 8 7 6 5
0 0 0 0 0 1 1 1
Description/Enumeration
4 3 2 1 0
1 1 1 1 1