Texas Instruments OMAP5912 Reference Manual page 617

SPRU753A
DSP clock subdomains (CLKM2) (these belong to the MPU power
domain and must be requested by the MPU).
e) The DSP masks/unmasks interrupts in the DSP interrupt handler to
ensure a wake-up path.
f) The DSP executes the IDLE instruction.
g) The DSP input clock (DSP_CK) is shut down automatically by the
OMAP CLKRST module.
h) The DSP power domain is in inactive state. The MPU can detect when
the transition is completed by monitoring the IDLE_DSP bit in the
ARM_SYSST register of the OMAP3.2 CLKRST module.
3) DSP active to sleep state transition
a) The MPU requests the DSP to enter into DSP idle mode for sleep state
via mailbox or shared memory.
b) DSP programs the ICR register of DSP to shut down all megacell
subdomain clocks.
c) DSP programs registers DSP_IDLECT1 and/or DSP_IDLECT2 of the
OMAP3.2 CLKRST module to set the state of the OMAP3.2 DSP clock
subdomains (CLKM2) (these belong to the MPU domain and are
requested by MPU).
d) The DSP masks all interrupts in the DSP interrupt handler. There is
no direct wake-up path through DSP interrupts.
e) DSP executes an IDLE instruction.
f) The DSP input clock (DSP_CK) is shut down automatically by the
OMAP3.2 CLKRST module.
g) The DSP power domain is in inactive state. The MPU can detect when
the transition is completed by monitoring the IDLE_DSP bit in the
ARM_SYSST register of the OMAP3.2 CLKRST module.
h) The MPU puts the DSP into reset state by asserting the DSP_EN and
DSP_RST bits into the ARM_RSTCT1 register of the CLKRST
module.
i) The MPU disables the DSP clock by deasserting the EN_DSPCK bit
in the ARM_CKCTL register of CLKRST.
j) The MPU programs the ULPD POWER_CTRL_REG[12] to assert the
ISOLATION_CONTROL bit to activate the DSP domain isolation
wrapper.
k) The MPU sets the GPIO that controls the external analog switch to
power down the DSP domain. (It may also be done through an SPI/I
interface). The DSP domain is in sleep state.
OMAP5912 Power Modes
Power Management
2
C
99