Texas Instruments OMAP5912 Reference Manual page 1125

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

I2C Multimaster Peripheral
2.5.4
START and STOP Conditions
Figure 19.
Start and Stop Condition Events
SDA
SCL
2
2.6
I
C Operation
Serial Data Formats
60
Serial Interfaces
2
The I
C module generates start and stop conditions when it is configured as
a master:
START condition is a high-to-low transition on the SDA line while SCL is
-
high.
STOP condition is a low-to-high transition on the SDA line while SCL is
-
high.
The bus is considered to be busy after the START condition (BB = 1) and free
after the STOP condition (BB = 0).
Start
condition (S)
2
The I
C controller operates in 16-bit word data format (byte write access
supported for the last access). Each byte put on the SDA line is 8 bits long. The
number of bytes that can be transmitted or received is unrestricted. The data
are transferred with the most-significant bit (MSB) first. Each byte is followed
by an acknowledge bit from the I
controller supports endianism.
Stop
condition (P)
2
C module, if it is in receiver mode. The I
2
C
SPRU760B

Advertisement

Table of Contents
loading

Table of Contents