Texas Instruments OMAP5912 Reference Manual page 161

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Table 25. EMIFS Abort Address Register (EMIFS_AADDR)
Bit
Field
31:0
AA
Table 26. EMIFS Abort Type Register (EMIFS_ATYPER)
Bit
Field
31:5
Reserved
4
TOE
3
RAE
2:1
HID
0
ABORT_FLAG
SPRU749A
Base Address = 0xFFFE CC00, Offset = 0x44
Description
Abort address
This register holds the address involved in the aborted transaction.
Base Address = 0xFFFE CC00, Offset = 0x48
Description
Reserved. To ensure software compatibility, reserved bit
should be write to 0 and read value should be
considered undefined.
Time out error. Time out status bit set to 1 if abort was
caused by a time-out error.
Restricted access error. Restricted access status bit is
set to 1 if abort was caused by a restricted access error.
Host ID. Specify the source of the aborted transaction:
00: MPU
01: DSP
10: DMA
11: OCP-I
Abort status bit. Reading the abort type register reset
the abort status bit.
0: No abort
1: Abort
This register reports the type of the transaction that has been aborted.
Traffic Controller
R/W
Reset
R
0x00000000
R/W
R/W
0x0000000
R
R
R
R
OMAP3.2 Subsystem
Reset
0
0
00
0
103

Advertisement

Table of Contents
loading

Table of Contents