Texas Instruments OMAP5912 Reference Manual page 1102

Multimedia processor device overview and architecture
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1.4.2
DMA Protocol
DMA Transmit Protocol in Master Mode
SPRU760B
The interrupt (nIRQ) waveform is the same as the one in MCU-DSP
The protocol has several steps:
Step 1: MCU-DSP writes to the setup and control registers (SPI_SET1,
SPI_SET2, and SPI_CTRL).
When DMA_EN is set, a transmit DMA request is generated, once the
WR bit is set.
Step 2: The DMA writes the data to the transmit register (SPI_TX). Once the
data is written:
The transmit DMA request is cleared.
-
The TX_EMPTY status bit is reset in the data status register
-
(SPI_DSR).
The transmit register (SPI_TX) is copied into the shift register
-
(SPI_SR).
The device enable goes low (nTSPENi), if CEi = 0 in SPI_SET2.
-
The shift register clock is activated (SRCLK) and the transmis-
-
sion starts.
Step 3: When the transmission is completed:
The device enable goes high (nTSPENi) if CEi = 0 in SPI_SET2.
-
TX_EMPTY is set in the data status register (SPI_DSR).
-
A transmit DMA request is generated.
-
Another transmission is able to start (Step2 → Step3 → Step2
-
→ Step3...).
To stop the process, the MCU-DSP must reset the WR bit in the control register
(SPI_CTRL).
SPI Master/Slave
protocol.
Serial Interfaces
37

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