Texas Instruments OMAP5912 Reference Manual page 228

MPU and MPUI Port
5.1.4 MPUI Port RAM Access
170 OMAP3.2 Subsystem
a means to adjust the MPUI output strobe timing is available (in between the
MPUI and the MPUI port. The strobe active (low) pulse defines the beginning
and end of a transaction. Because the MPUI may be required to communicate
(through the MPUI port) with peripherals of varying speeds, the beginning and
end of a transaction. Because the MPUI may be required to communicate
(through the MPUI port) with peripherals of varying speeds, a means to adjust
the MPUI output strobe timing is available (in HOM).
To allow slow peripherals to answer, it is possible to stretch an access over
2 * n MPUI clock
(MPUI_CONTROL). The peripheral then has n clock cycles to answer
(n cycles the strobe is high; n cycles the strobe is low). Note that the MPUI
clock referenced here is the input clock reference to the MPUI module
generated from the clock and reset management module. The clock rate for
the MPUI is fixed to the same value as that of the OMAP 3.2 traffic controller
module. For more detail, see Section 4, Clock Generation and Reset
Management.
In HOM, only the MPU, system DMA or OCP-I can access the SARAM through
the MPUI. Although the entire SARAM is accessible, the MPU must first set
the accessible size of the SARAM. The API_SIZE bit field in the register
(DSP_MPUI_CONFIG) sets the size using the formula, (integer value of
API_SIZE * 8K bytes), starting from the first SARAM block. For detail on
available SARAM memory space and SARAM start addresses, see the
memory map in chapter 10. For detail on the translation of DSP internal
(logical) addresses into OMAP (physical) addresses, see OMAP5912
Multimedia Processor DSP Sybsystem Reference Guide (literature number
SPRU750).
The host can not access the SARAM before releasing the MPU reset. After
releasing the MPU reset and before releasing the DSP reset, the DSP is in
HOM and all the SARAM is accessible only by the host as the default
API_SIZE value is 0xFFFF. Then the (DSP_MPUI_CONFIG) can be
programmed to give the host exclusive access to a portion or to all the SARAM.
After the DSP reset is released, the DSP is automatically changed to SAM;
consequently, whatever the value of the (DSP_MPUI_CONFIG) , all the
SARAM is shared between the DSP and the host. DSP_MPUI_CONFIG must
be set when the ARM_RSTCT1.DSP_RST register bit is 0, and when MPU
reset is deasserted.
ARM_RSTCT1.DSP_RST bit is 1, then ARM_RSTCT1.DSP_RST must be
cleared to 0 again before the new DSP_MPUI_CONFIG value can take effect."
cycles using the
If DSP_MPUI_CONFIG
ACCESS_FACTOR
changes while
SPRU749A
bits in
the