Texas Instruments OMAP5912 Reference Manual page 241

Multimedia processor device overview and architecture
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Table 96. MPUI Status Register (MPUI_STATUS)
Bit
Name
31:13
Reserved
12:11
ACCESS_STATUS
10:3
TIMEOUT_VAL
2
CS_EN
1
ACCESS_DONE
0
HOMNSAM_FLAG
Table 97. DSP Status Register (DSP_STATUS)
Bit
Name
31:12
Reserved
11
HRHOMNSAM
10
HAHOMNSAM
SPRU749A
Base Address = 0xFFFE C900, Offset = 0x10
Function
Current access in progress is:
00: MPU access
01: System DMA access
10: OCP-I access
11: No access
Current value of timeout counter
MPUI busy status.
0: MPUI is busy executing a transaction or host/shared
mode switch. All new MPU/OCP-I/system DMA
accesses must wait until CS_EN is 1.
1: A new access may be started in the MPUI.
MPUI access status (similar to CS_EN, without mode
switch indication)
0: MPUI is accessing MPUI port.
1: No access in progress; last access is completed.
Current access mode when ACCESS_DONE = 0, or
last access mode when ACCESS_DONE = 1.
0: SAM
1: HOM
Table 97 describes (DSP_STATUS) bits. For debug purposes, this register
stores the state of several signals internal to the DSP subsystem. Values are
captured at each MPUI clock cycle.
Base Address = 0xFFFE C900, Offset = 0x14
Function
Reflects DSP HOM or SAM setting for DSP TIPB
Reflects DSP HOM or SAM setting for MPUI port RAM
MPU and MPUI Port
R/W
R/W
R
R
R
R
R
R/W
R
R
R
OMAP3.2 Subsystem
Reset
0x0000
11
0xFF
1
1
1
Reset
0x0000
0
0
183

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