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Software NAND Flash Controller
ac Specifications and Issues
2.2.5
EMIFS Interface With NAND CE Don't Care Flash Device Option
80
Memory Interfaces
A review of the Samsung K9K1G08U0M NAND flash device ac specifications
versus the EMIFS interface has resulted in the following findings:
-
All timings required for write accesses are acceptable. WP (WE pulse
width) minimum is 25 ns, which implies a maximum rate of 40 MHz.
-
All timings required for read accesses are acceptable for interface with
EMIFS with the note that t
must be observed. This can be controlled by the new OE control added
to OMAP 3.2.
In this case, there is no dedicated signal to interface the NAND flash device.
Instead, the standard NOR flash interface is used. Non-multiplexed NOR flash
and CompactFlash can also be connected at the same time.
The procedure to follow is the same as that described for NAND CE Don't Care
devices.
Figure 23 shows how CompactFlash, NAND flash, and an asynchronous NOR
flash can be connected.
min of 50 ns (ALE to RE delay-read cycle)
AR2
SPRU756A
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