Texas Instruments OMAP5912 Reference Manual page 224

MPU and MPUI Port
Table 85. DPLL2 Control Register (DPLL2_CTL_REG)
Bit Name
15:0 RESERVED
5 MPU and MPUI Port
166 OMAP3.2 Subsystem
Base Address = 0xFFFE D000, Offset = 0x00
Function
Reserved. Do not write to these bits.
The MPU, system DMA, and OCP initiator (OCP-I) can access the DSP
memories and peripherals via two interfaces: the MPUI and the MPUI port. The
MPUI and the MPUI port have distinct features and functions:
-
The MPUI is a module in the MPU subsystem that connects to the MPUI
port.
-
The MPUI port is a module contained in the DSP subsystem.
Figure 8-1 shows the MPU- and DSP-relevant modules and connections. In
this figurechapter, DMA represents the system DMA.
Reset
Value
R/W
R 0x00002000
SPRU749A