Texas Instruments OMAP5912 Reference Manual page 505

Multimedia processor device overview and architecture
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Configuration
Table 50. Configuration Status Register (CONF_STATUS) (Continued)
Bit
Name
1
CONF_ARM_BOOT_STAT
_R
0
CONF_RESET_MODE_
STAT_R
Table 51. Reset Control Register (RESET_CONTROL)
Bit
Name
31:7
UNUSED
6
CONF_RNG_IDLE_MODE
5
CONF_CAMERAIF_
RESET_R
4
CONF_UWIRE_RESET_R
88
Initialization
Base Address = 0xFFFE 1000, Offset Address = 0x130
Function
This register contains boot mode active
chip-select (CONF_ARM BOOT MODE),
latched at the rising edge of PWRON_RESET.
Emulator type devices only,
0: MPU boots from internal ROM
1: MPU boots from external memory
Reset value for this signal depends on
MPU_BOOT and EFUSE_DEVICE_TYPE
signals.
This register contains the status of the
RESET_MODE pin latched at the rising edge
of the reset pin PWRON_RESET.
0: Reset mode 0
1: Reset mode 1
The actual reset value for all bits in this register depends on the device
configuration at power-up reset. The values from the Reset column are not
applicable.
The boot ROM code uses CONF_STATUS register bits to determine the
execution path during boot time.
Base Address = 0xFFFE 1000, Offset Address = 0x140
Function
Not implemented.
RNGidle control.
0: RNGidle disabled
1: RNGidle enabled
This register controls reset of the camera IF.
0: Module is in reset.
1: Module is in functional mode.
This register controls reset of the µWire.
0: µWire is in reset.
1: µWire is in functional mode.
R/W
Reset
R
N/A
R
N/A
R/W
Reset
R
0x0000000
R/W
0x1
R/W
0x1
R/W
0x1
SPRU752B

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