Texas Instruments OMAP5912 Reference Manual page 535

Multimedia processor device overview and architecture
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Figure 1.
ULPD and Clock Domains in OMAP5912
External
clocks
Clock
reference
ULPD
32-kHz clock
System
clock
System clock
12/13 MHz/19.2 MHz
External clock
or oscillator
SPRU753A
Clock control
module2
Clock control
module1
DPLL1
Clock control
module3
Clocks
and reset
controller
RTC clock domain
32-kHz
External clock
or oscillator
The ULPD is composed of one state machine, a clock management module,
and a control register file.
Ultralow-Power Device
OMAP5912
Processor clock
MMU clock
Timers clock
Watchdog clock
Interrupts clock
Pheriperals clock
DSP clocks
domain
Processor clock
MMU clock
Timers clock
Watchdog clock
Interrupts clock
Pheriperals clock
MPU clocks
domain
Traffic controller clock
OCP initiator port clock
OCP L1 port clock
OCP L2 port clock
DMA controller clock
MPUI port clock
TPIB bridge clock
LCD controller clock
Traffic
controller
clocks domain
RNG
oscillators
Power Management
17

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