Texas Instruments OMAP5912 Reference Manual page 649

Table 12. Functional Multiplexing DSP DMA A Register (FUNC_MUX_DSP_DMA_A)
Bit Name
31:30 RESERVED
29:25 CONF_DSP_DMA_REQ_06
24:20 CONF_DSP_DMA_REQ_05
19:15 CONF_DSP_DMA_REQ_04
14:10 CONF_DSP_DMA_REQ_03
9:5 CONF_DSP_DMA_REQ_02
4:0 CONF_DSP_DMA_REQ_01
SPRU755B
Base Address = 0xFFFE 1000, Offset Address = 0xD0
Function
Reserved
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(6). n is between 0 and 27
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(5). n is between 0 and 27
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(4). n is between 0 and 27
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(3). n is between 0 and 27
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(2). n is between 0 and 27
Writing value n in this register maps DMA
request source n+1 to DSP DMA controller
DMA_REQ(1). n is between 0 and 27
This register controls the DSP DMA crossbar and defines the mapping of DSP
peripheral DMA requests 1 through 6 to OMAP3.2 DSP DMA requests. 28
DSP peripheral DMA requests can be mapped to the 19 DSP DMA controller
requests. The values programmed in the register represent a zero-based
numbering of DMA_REQn (starting with 1). Thus, peripheral DMA_REQ1 is
written as zero. For example, if bits 4:0 are equal to 3, then n+1=4, and DSP
DMA_REQ(1) maps to DMA DSP peripheral request source 4 (
.
.
.
.
.
.
Direct Memory Access (DMA) Support
GDMA Handlers
R/W Reset
R/W 0x0
R/W 0x05
R/W 0x04
R/W 0x03
R/W 0x02
R/W 0x01
R/W 0x00
.
MCSI2 RX)
25