System DMA
36
Direct Memory Access (DMA) Support
TIPB configuration interface:
-
Used by the MPU to control/configure the system DMA. Cannot be
J
used as source or destination in a DMA transfer.
External slow memory interface (Flash/ROM):
-
DMA accesses can be either single (8/16/32-bit) or burst (4x32-bit). If
J
burst access is used and data packets are not 16-byte aligned, then
single accesses (8/16/32-bit) are performed.
External fast memory interface (SDRAM, DDR):
-
DMA accesses can be either single (8/16/32-bit) or burst (4x32-bit). If
J
burst access is used and data packets are not 16-byte aligned, then
single accesses (8/16/32-bit) are performed.
OCP-T1 and OCP-T2 interface (Test RAM, Camera peripheral):
-
DMA accesses can be either single (8/16/32-bit) or burst (4x32-bit). If
J
burst access is used and data packets are not 16-byte aligned, then
single accesses (8/16/32-bit) are performed.
TIPB interface (to peripherals via TIPB bridge):
-
All DMA accesses are done in single-access mode (8/16/32 bits).
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MPU interface (to SARAM and DARAM inside DSP subsystem):
-
All DMA accesses are done in single access mode (8/16/32 bits). For
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32-bit transfer, the MPU interface does the packing and unpacking.
LCD interface
-
Port to the OMAP embedded LCD controller. Supports 16-bit access
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for the OMAP LCD controller.
For all ports, only the number of programmed bytes are transferred; that is,
there are no trailing or dirty bytes at the end of transfer.
Table 19 provides possible source ports (SRC), destination ports (DST), and
data transfers.
SPRU755B