Texas Instruments OMAP5912 Reference Manual page 845

Multimedia processor device overview and architecture
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2.1.11
Invalid Block Management
Table 10. Decision Table When Operation Fails
SPRU756A
Over time, reading/programming/erasing NFMC can introduce errors in data.
ECC can protect the data, but if there is more than one error, ECC cannot
correct any errors. Invalid blocks are defined as blocks that contain one or
more invalid bits whose reliability is not ensured by the NFMC manufacturer.
All NFMC locations are erased (0xFF), except locations where the invalid
block information is written before shipping. The invalid block status is defined
th
by the 6
byte in the spare area in page 0 and page 1 (the first 2 pages) of a
block. Because the invalid block information is also erasable, it is impossible
to recover the information once it has been erased. Therefore, the system
must be able to recognize the invalid block based on the original invalid block
information and create an invalid block table. If, after an operation, a block
becomes corrupted, it must be added to the invalid block table. This table
management is done by software. When a page or block becomes corrupted,
a value other than 0xFF must be written in the invalid block byte in the spare
area. The invalid block location can depend on the NFMC. For instance, on the
1G-bit mono-die, the invalid block status is defined by the 1
area (see Figure 13).
If an operation fails, a decision must be made, as shown in Table 10.
Read/Write
Failure
Write
Erase failure
Program failure
Read
Single-bit failure
Multiple-bit failure
Memory Interfaces for the EMIFS
st
byte of the spare
Decision
Write data to a new page.
Mark block as invalid.
Write data to a new page.
Mark block as invalid.
ECC correction
Uncorrectable error
Mark block as invalid.
Memory Interfaces
39

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