Texas Instruments OMAP5912 Reference Manual page 309

Multimedia processor device overview and architecture
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DSP Memory
Table 12. DSP Peripheral Mapping (Continued)
Start Byte Address (hex)
X01 2800
X01 2C00
X01 3000
X01 3400
X01 3800
X01 3C00
X01 4000
X01 4800
X01 5000
X01 5800
X01 6000
X01 6800
X01 7000
X01 7400
X01 7C00
X01 8000
X01 8400
X01 8800
X01 8C00
X01 9000
X01 9400
X01 9800
X01 9C00
X01 A000
† All other I/O memory addresses are reserved.
‡ Internal wait states for accessing peripherals are set by strobe fields in TIPB CM register (see Section 4.1, Control Mode
Register).
46
DSP Subsystem
Name
MCSI1
GPTIMER4
Reserved
GPTIMER5
2
I
C multimaster
GPTIMER6
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
McBSP3
GPTIMER7
MMC/SDIO2
Reserved
Reserved
Reserved
Reserved
Reserved
GPIO3
UART3
GPIO4
Reserved
CS
5
5
6
6
7
7
8
9
10
11
12
13
14
14
15
16
16
17
17
18
18
19
19
20
Strobe
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
Strobe1
SPRU750A

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