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DMA Receive Protocol in Master Mode
SPRU760B
The protocol has several steps:
Step 1: MCU-DSP writes to the setup registers (SPI_SET1 and SPI_SET2).
Step 2: MCU-DSP writes to the control register (SPI_CTRL). Once the RD
bit is set:
The device enable goes low (nTSPENi) if CEi = 0 in SPI_SET2.
-
The shift register clock is activated (SRCLK) and the reception
-
starts.
Step 3: When the reception is completed:
The device enable goes high (nTSPENi) if CEi = 0 in SPI_SET2.
-
The RX_FULL status bit is set in the data status register
-
(SPI_DSR).
The shift register (SPI_SR) is copied into the receive register
-
(SPI_RX).
A receive DMA request is generated.
-
Step 4: Once the DMA reads the receive register (SPI_RX):
The device enable goes low (nTSPENi) if CEi = 0 in SPI_SET2.
-
The RX_FULL status bit is reset in the data status register
-
(SPI_DSR).
The receive DMA request is released.
-
Another reception starts (Step3 → Step4 → Step3 → Step4...).
-
To stop the process, the MCU-DSP must reset the RD bit in the
control register (SPI_CTRL).
SPI Master/Slave
Serial Interfaces
39
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