Texas Instruments OMAP5912 Reference Manual page 148

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Traffic Controller
Figure 41.
OCP-I Block Diagram
SSideBand
MSideBand
MAddr (32)
From
OCP
initiator
(master)
SData (32)
MData (32)
SResp (2)
MCmd (3)
90
OMAP3.2 Subsystem
OCP master port
OCP
front-
end
MAddr-Address Bus (To all Sub-targets)
Address
decoding
and
checker
MCmd
MCmd
SResp and SData
Abort management
Control and
registers bank
Though OCP-I has visibility to all OMAP resources, a protection register allows
validation of the access permission on a per target basis. Any access to an
unauthorized resource generates an abort.
The MPU controls the OCP-I port through its private TIPB; if permission is
given to the external initiator to access the private TIPB, the external master
also accesses the OCP-I configuration registers.
MData Bus (To all Sub-targets)
MData Bus (To all Sub-targets)
Select signals
Muxes
Target1 Lock
Target1 SResp
Target1 SData
Target1 Abort
SCmdAccept
Target1 MCmd
To/from
all
OMAP
internal
ports
Target2 Lock
Target2 Sresp
Target2 SData
Target2 Abort
SCmdAccept
Target1 MCmd
SPRU749A

Advertisement

Table of Contents
loading

Table of Contents