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DSP Memory Management Unit
Figure 20.
Translation for a Small Page Included in a Fine Page
23
Table index
31
31
31
Page table base address
31
Page table base address
31
31
70
DSP Subsystem
Logic address
20 19
L2 table index
4
Translation table base
Translation base
25
Translation base
First level descriptor
Second level descriptor
Page base address
Physical address
Page base address
12
11 10
9
Page index
10
7 6
7 6
5
0
Table index
12
11
12
11
L2 table index
12
11
6
5
AP
12
11
Page index
0
12
0
2 1
0
0
0
2 1
0
1
1
2 1
0
0
0
4
3
2
1
0
1 0
0
SPRU750A
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