Texas Instruments OMAP5912 Reference Manual page 476

Multimedia processor device overview and architecture
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Table 31. Configuration Revision Register (CONF_REV)
Bit
Name
31:8
CONF_REV_RESERVED
7:0
CONF_REV_R
Table 32. Voltage Control 0 Register (VOLTAGE_CTRL_0)
Bit
Name
31:14
CONF_VOLTAGE_
RESERVED
13
RESERVED
12
CONF_VOLTAGE_RTC_R
For EMIFS and EMIFF 3.0-V and 3.3-V operation, use the 2.75V setting.
Note: For a description of 1.8-V and 2.75-V nominal voltage ranges, see the Data Manual (SPRS231).
SPRU752B
Base Address = 0xFFFE 1000, Offset Address = 0x58
Function
Reserved for future expansion.
This 8-bit field indicates the revision number of
the current module. This value is fixed by
hardware.
The 4-bit LSBs indicate a minor revision.
The 4-bit MSBs indicate a major revision.
Example:
0x10 => Version 1.0
Reset has no effect on the value returned.
This is a read-only register that contains the revision number of the module.
A write to this register has no effect.
Base Address = 0xFFFE 1000, Offset Address = 0x60
Function
Reserved for future expansion.
This bit should be set as 0.
This bit controls the drive strength of the
DVDD10 RTC voltage domain. The bit controls
the low/high voltage mode. The voltage range
supported is defined in the SPRS231
document.
0: Low-voltage mode drive strength of nominal
(nominal 1.80-V range).
1: Interface in high-voltage mode drive strength
(nominal 2.75-V range).
Configuration
R/W
Reset
R
0x000000
R
0x10
R/W
Reset
R/W
0x00000
R/W
0X0
R/W
0x0
Initialization
59

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