Texas Instruments OMAP5912 Reference Manual page 303

Multimedia processor device overview and architecture
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DSP Memory
Figure 9.
DSP Memory Space
Byte address
00_0000
MMRs
00_0100
DARAM
64K bytes−0X100 bytes
8 blocks
(Table A)
01_0000
SARAM
96K bytes
12 blocks
02_8000
External to
DSP subsystem
16 MB
mapped by
DSP MMU
into MPU 32-bit
address space
FF_8000
PDROM
32K-byte
masked ROM
Reset vectors
FF_FF00
NMI vectors
Emu/test vectors
L2 peripherals
TC abort
Bus error
FF_FFFE
Note:
Byte addresses 0xFF8000-0xFFFFFF map to PDROM for mpnmc = 0; otherwise, this range is mapped externally
40
DSP Subsystem
Word address
00_0000
00_0080
00_8000
01_4000
7F_C000
7F_FF80
32 interrupt
vectors
7F_FFFF
The TMS320C55x DSP has 24-bit unified address space for both data and
program references.
* Program accesses are specified and displayed as byte addresses.
* Data objects are word addressable and are specified by 16-bit
word addresses.
* The DMA controller references byte addresses.
To access control and data registers associated with various OMAP5912
peripherals, the DSP uses 16-bit I/O space. This space is referenced
by using appropriate I/O access qualifiers with load or store instructions.
Restrictions apply for data objects spanning 64K-word (128K-byte) boundaries.
See TMS320C55x DSP CPU Reference Guide (SPRU371).
Table A DARAM block boundaries
Byte address
daram0
00 _0000
daram1
00 _2000
daram2
00 _4000
daram3
00 _6000
daram4
00 _8000
daram5
00 _A000
daram6
00 _C000
daram7
00 _E000
Table B SARAM block boundaries
Byte address
saram0
01 _0000
saram1
01 _2000
saram2
01 _4000
saram3
01 _6000
saram4
01 _8000
saram5
01 _A000
saram6
01 _C000
saram7
01 _E000
saram8
02 _0000
saram9
02 _2000
saram10
02 _4000
saram11
02 _6000
Word address
00 _0000
00_1000
00_2000
00_3000
00_4000
00_5000
00_6000
WORD Addr
00_7000
Word address
00_8000
00_9000
00_A000
00_B000
WORD Addr
00_C000
00_D000
00_E000
00_F000
01_0000
01_1000
01_2000
01_3000
SPRU750A
.

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