Texas Instruments OMAP5912 Reference Manual page 438

Multimedia processor device overview and architecture
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Table 5.
Reset Sources for Peripherals (Continued)
Peripheral Name
General-purpose timer 3
General-purpose timer 4
General-purpose timer 5
General-purpose timer 6
General-purpose timer 7
(sleep timer)
General-purpose timer 8
(32K DSP)
McBSP2
OCP SWRST: Reset software done in corresponding module.
SWRST1: PER_EN (bit 0) in ARM_RSTC2 is cleared to 0.
§
SWRST2: Set ARM_RST (bit 0) in ARM_RSTCT1 and clear DSP_EN (bit 1) in ARM_RSTCT1.
SWRST3: DSP_PEREN (bit 0) in DSP_RSTCT2 is cleared to 0.
#
Warm reset: Source can be MPU_RST, global software reset, or 32-kHz watchdog time-out.
||
SW control via RESET_CONTROL register (see Table 51).
k
SW control via MOD_CONF_CTRL_1[23].
SPRU752B
HW Reset
Class 2 Modules (Continued)
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
Cold reset/Warm
reset/ARM_WD/SWRS
T2/SWRST1
SW Reset
Wrapper/
Switch
OCP SWRST
Static switch
OCP SWRST
Static switch
OCP SWRST
Static switch
OCP SWRST
Static switch
OCP SWRST
Static switch
OCP SWRST
Static switch
Partial
Static switch
Reset Architecture
Wrapper/Switch Reset
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Cold reset/Warm
reset/ARM_WD/DSP_
WD/SWRST3/SWRST
2/SWRST1
Initialization
21

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