Texas Instruments OMAP5912 Reference Manual page 581

Multimedia processor device overview and architecture
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Table 33. Software Disable Request Register (SOFT_DISABLE_REQ_REG)
(Continued)
Bit
Name
7
DIS_UART1_DPLL_REQ
6
DIS_USB_HOST_DPLL_REQ
5
DIS_CAM_DPLL_MCLK_REQ
4
UNUSED
3
DIS_PERIPH_REQ
2
UNUSED
1
DIS_SDW_MCLK_REQ
0
DIS_COM_MCLK_REQ
Table 34. Reset Status Register (RESET_STATUS)
Bit
Name
15:4 UNUSED
3
32K watchdog time-out
SPRU753A
Base Address =0xFFFE 0800, Offset = 0x68
Function
Disable UART1 PLL hardware request
0: Not disabled
1: Disabled
Disable the USB host system clock
hardware
0: Not disabled
1: Disabled
Disable hardware CAM_PLL_MCLK_REQ.
0: Not disabled
1: Disabled
Unused
Disable hardware PERIPH_REQ request.
0: Not disabled
1: Disabled
Unused
Disable SDW_MCLK_REQ if active
0: Not disabled
1: Disabled
Disable COM_MCLK_REQ and
COM_MCKO_SEL if active
0: Not disabled
1: Disabled
Base Address = 0xFFFE 0800, Offset = 0x6C
Function
Unused
Whenever a 32-kHz watchdog time-out event occurs, this
bit is asserted. The user clears this bit by writing a 0.
TIPB reset has no effect on this bit.
0: 32-kHz watchdog time-out has not occurred since last
PWRON_RESET (or user has cleared this bit).
1: 32-kHz watchdog time-out has occurred since last
PWRON_RESET (and since last time user has cleared this
bit).
Ultralow-Power Device
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
Power Management
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Reset
0x0
0x0
63

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