Texas Instruments OMAP5912 Reference Manual page 128

Multimedia processor device overview and architecture
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Table 1.
Idle Time Between Different Bus Access Transitions (BTMODE = 0)
Access(n)
RD(csx)
RD(csx)
WR(csx)
WR(csx)
RD(csx)
RD(csx)
WR(csx)
WR(csx)
70
OMAP3.2 Subsystem
-
After a read completion, if no other access (RD, WR) is pending, the data
bus is driven with the previous read value. The bus turn-around time (OE
going high to direction going out) is a minimum of 1 TC_CK cycle and can
be extended through BTWST.
-
Table 1 shows the bus turn around cycles inserted for various transitions
with EMIFS when BTMODE=0.
Access(n+1)
Chip-Select
RD(csx)
WR(csx)
RD(csx)
WR(csx)
RD(csy) x != y
WR(csy) x != y
RD(csy)x != y
WR(csy)x !=y
Idle Time
Same
Inserted
Same
Inserted
Same
Not inserted
Same
Not inserted
Different
Inserted
Different
Inserted
Different
Not inserted
Different
Not inserted
Length(BTWST)
CSX
CSX
CSX
CSX
SPRU749A

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