Texas Instruments OMAP5912 Reference Manual page 708

System DMA
Table 34. DMA Global Control Register (DMA_GCR)
Bit Name
15:5 RESERVED
4 ROUND_ROBIN_DISAB
LE
3 CLK_AUTOGATING_O
N
2 FREE
1:0 RESERVED
84 Direct Memory Access (DMA) Support
Base Address = 0xFFFE DC00, Offset = 0x00
Function
Reserved
DMA physical channel scheduler round robin
scheduling disable:
0: DMA physical channel scheduler uses round
robin scheduling scheme to schedule next
available logical channel.
1: DMA physical channel scheduler uses fixed
weighted scheduling scheme (from LCH_0 to
LCH_i) to schedule next available logical channel.
DMA Clock autogating on:
0 = DMA clocks are always on.
1 = DMA cuts off its clocks, according to its
activity. Clock_Autogating_on must always be
enabled but can be disabled for silicon debug
reasons.
DMA reaction to the suspend signal:
0 = DMA suspends all the current transfers when it
receives the suspend signal from the processor.
Transfers resume when the MPU releases the
suspend signal.
1 = DMA continues running when it receives the
suspend signal from the processor (For example:
when the processor is halted for debug by a
breakpoint ).
Reserved
R/W Reset
R/W ND
R/W 0
R/W 1
R/W 0
R/W 0
SPRU755B