Texas Instruments OMAP5912 Reference Manual page 500

Multimedia processor device overview and architecture
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Table 47. Pullup/Pulldown Selection 4 Register (PU_PD_SEL_4) (Continued)
Bit
Name
9
CONF_PU_PD_G2
8
CONF_PU_PD_K8
7
CONF_PU_PD_H4
6
CONF_PU_PD_H3
5
CONF_PU_PD_K7
4
CONF_PU_PD_L4
3
CONF_PU_PD_V2
2
CONF_PU_PD_P3
1
CONF_PU_PD_U4
0
CONF_PU_PD_W1
Table 48. Module Configuration Control 1 Register (MOD_CONF_CTRL_1)
Bit
Name
31
CONF_CAM_CLKMUX_R
30:29
CONF_PMT_DCB_
SELECT_R
SPRU752B
Base Address = 0xFFFE 1000, Offset Address = 0xC4
Function
Configure pullup (=1) or pulldown (=0) on G2.
Configure pullup (=1) or pulldown (=0) on K8.
Configure pullup (=1) or pulldown (=0) on H4.
Configure pullup (=1) or pulldown (=0) on H3.
Configure pullup (=1) or pulldown (=0) on K7.
Configure pullup (=1) or pulldown (=0) on L4.
Configure pullup (=1) or pulldown (=0) on V2.
Configure pullup (=1) or pulldown (=0) on P3.
Configure pullup (=1) or pulldown (=0) on U4.
Configure pullup (=1) or pulldown (=0) on W1.
This register controls the selection of the pullup or pulldown (0 = pulldown, 1
= pullup). Consult the pinout section of the Application Processor Data Manual
(SPRS231) to determine whether a pullup or pulldown exists on the specified
I/O. COMP_MODE_CTRL_0 must be programmed to 0xEAEF for this register
to control the selection.
Base Address = 0xFFFE 1000, Offset Address = 0x110
Function
Selection of camera_interface clock (MCLK)
between ARMXOR and CAM_MCKO.
0: Corresponds to ARMXOR clock from
OMAP3.2.
1: Corresponds to CAM_MCKO from ULPD
module.
Generates the selection signal for the
multiplexer in OMAP3.2 for observability of DLL
output bus (DCB[7:0]).
00 and 10: observe DCB bus from URD_DLL.
01 and 11: observe DCB bus from WRQ_DLL.
Configuration
R/W
Reset
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
0X0
R/W
Reset
R/W
0x0
R/W
0x0
Initialization
83

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