Texas Instruments OMAP5912 Reference Manual page 780

DSP DMA
4.23 DMA Channel Configuration Registers
Table 111. Channel Source Destination Parameters Registers
(DMA_CSDP0...DMA_CSDP5)
Bit Name
31:16 NC
15:14 DST_BURST_EN
13 DST_PACK
12:9 DST
156 Direct Memory Access (DMA) Support
The register bit descriptions in Table 111 through Table 125 are generic in that
the register sets for each of the six DMA channels (0-5) are identical.
Function
Destination burst enable
A burst in the DMA controller refers to four
consecutive 32-bit accesses at a DMA port.
DST_BURST_EN determines whether the DMA
controller performs a burst at the destination port
of the channel.
00: Single access
01: Single access
10: Burst 16 bytes
11: Illegal
If the destination port of the channel has no burst
access capability, this field is ignored.
Destination packing
The DMA controller can perform data packing to
double or quadruple the amount of data passed to
the destination. For example, if an 8-bit data type
is selected and the destination port has a 32-bit
data bus, four 8-bit pieces of data can be packed
into 32 bits before being sent to the destination.
The packing is performed in respect to endianism.
0: The destination port never makes packed
accesses.
1: The destination port makes packed accesses
when possible.
Transfer destination
A unique identifier is given to each port. This field
indicates which port is the destination of the
channel transfer operation.
0000: SARAM
0001: DARAM
0010: EMIF
0011: TIPB
0100: MPUI
Others : Illegal
Type Reset
RW 00
RW 0
RW 0000
SPRU755B