Texas Instruments OMAP5912 Reference Manual page 221

Multimedia processor device overview and architecture
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Table 81. DSP Reserved Register 3 (DSP_CKOUT1)
Bit
Name
15:0
RESERVED
Table 82. DSP Reserved Register 4 (DSP_CKOUT2)
Bit
Name
15:0
RESERVED
4.4.3
DPLL Registers
SPRU749A
Base Address = 0xE100 8000 or 0x008000, Offset = 0x1C
Function
Reading these bits gives undefined values. Writing to
them has no effect.
Base Address = 0xE100 8000 or 0x008000, Offset = 0x20
Function
Reading these bits gives undefined values. Writing to
them has no effect.
Table 83 lists the 16-bit DPLL registers Table 84 and Table 85 describe the
register bits.
Clock Generation and Reset Management
R/W
R/W
R/W
R/W
OMAP3.2 Subsystem
Reset
0x0000
Reset
0x0000
163

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