Texas Instruments OMAP5912 Reference Manual page 231

5.2.2 Memory Accesses in HOM
SPRU749A
HOM_M (host only for SARAM access)
HOM_R (host only for DSP TIPB access)
SAM_M (shared access for SARAM, DARAM, EMIF access)
SAM_R (shared access for DSP TIPB access)
Only the DSP can select HOM or SAM. This is controlled by the SMOD bits of
(APIRS). Note that the MPU cannot write these bits, but it can read these bits.
Since SMOD has two bits, the following four mode combinations are available:
-
SAM for DSP memory and TIPB. The host and the DSP can access the
SARAM, DARAM, EMIF, and DSP TIPB peripherals.
-
SAM for DSP memory and HOM for DSP TIPB. Only by the host can
access the DSP TIPB peripherals via the DSP TIPB bus. The DSP is
denied access to all the peripherals. SARAM, DARAM, and EMIF are
accessible by the host and the DSP.
-
HOM for DSP memory and SAM for DSP TIPB. The host can configure the
SARAM for its exclusive access. The DSP can only access the
nonexclusive part of SARAM. The DSP TIPB peripherals are accessible
by the host and the DSP.
-
HOM for DSP memory and TIPB. The host can configure the SARAM for
its exclusive access. The DSP can only access the nonexclusive part of
SARAM. Only the host can access the DSP TIPB peripherals.
When the DSP reset is activated, HOM_M and HOM_R are automatically
selected. Thus, only the host can access the SARAM and DSP TIPB
peripherals at DSP reset. This allows programs or data to be downloaded to
SARAM to configure peripherals even during reset. When the DSP reset is
released, SAM_M and SAM_R are automatically selected. Thus, the host and
the DSP can access the SARAM, DARAM, EMIF, and DSP TIPB peripherals.
In HOM_M mode, only the MPU/system DMA/OCP-I can exclusively access
the specified portion of SARAM with its range controlled by the API_SIZE bits
of (DSP_MPUI_CONFIG). Memory requests are completely asynchronous
relative to the DSP clock. Therefore, memory accesses can be performed
without any wait states, allowing faster communication between MPUI and
SARAM. In HOM, the MPUI port is a simple bridge between MPU/system
DMA/OCP-I and SARAM memory bank for the address, data, and control
signals.
MPU and MPUI Port
OMAP3.2 Subsystem 173