Texas Instruments OMAP5912 Reference Manual page 989

OCP Interconnect
Figure 8. OCP and SSI Interconnects
3.1 OCP Introduction
38 Peripheral Interconnects
SSI DMA transfers are handled by the generic distributed DMA (GDD).
Because the SSI uses a proprietary bus interface (versatile interconnection
architecture (VIA)), bridges are implemented in the SSI interconnect to
perform data transfers between the SSI VIA bus and the OMAP3.2 OCP bus.
VLYNQ is also a full duplex interface, using a VBUS 1.0 protocol. A wrapper
around the VLYNQ core performs the protocol conversion VBUS to OCP and
OCP to VBUS.
In addition, data transfer between the USB host and OMAP3.2 are done
through the OCP interconnect and the OCPI port.
The GDD has priority over the USB.
VLYNQ
SSI interconnect
SSR
SST
USB On-The-Go
The OCP arbiter must interconnect two OCP master devices (peripherals),
such as GDD or VLYNQ and USB_OTG peripheral, to a single OMAP OCP_I
slave port. GDD or VLYNQ OCP_I port has priority over USB_OTG OCP_I
port.
GDD
32-bit MPU public bus
OCP interconnect
DSP P
EMIFS
EMIFF
MPU P
OCP−T1
OCP−T2
DSP S
OCPI
MPU S
LCD/
OMAP3.2
LCD W
SPRU758A