Texas Instruments OMAP5912 Reference Manual page 1096

Multimedia processor device overview and architecture
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MCU-DSP Receive/Transmit Protocol in Master Mode
SPRU760B
The protocol has several steps:
Step 1: MCU-DSP writes to the setup registers (SPI_SET1 and SPI_SET2).
Step 2: MCU-DSP writes to the transmit register (SPI_TX) (optional). This
is necessary only when you want to perform a transmission at the
same time.
Step 3: MCU-DSP writes to the control register (SPI_CTRL).
Once the RD bit is set:
The transmit register is copied into the shift register (SPI_SR).
-
The device enable goes low (nTSPEN[i]), if CEi = 0 in
-
SPI_SET2.
The shift register clock is activated (SRCLK) and the transmis-
-
sion and reception start.
One SRCLK cycle later, the RD bit is reset.
-
The WR bit has no effect on behavior. This bit is reset like RD, if it has been
set.
When the reception is completed:
The device enable goes high (nTSPEN[i]), if CEi = 0 in
-
SPI_SET2.
The RE bit is set in the interrupt status register (SPI_ISR).
-
The shift register (SPI_SR) is copied into the receive register
-
(SPI_RX).
An interrupt is generated if MSK0 is set in the interrupt enable
-
register (SPI_IER).
Step 4: Once the MCU-DSP has read the receive register (SPI_RX) and has
cleared the RE status bit (SPI_ISR), the interrupt request is re-
leased.
SPI Master/Slave
Serial Interfaces
31

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