Texas Instruments OMAP5912 Reference Manual page 569

Table 7. ULPD Registers (Continued)
Name
SETUP_ANALOG_CELL2_ULPD1_REG
SETUP_ANALOG_CELL1_ULPD1_REG
CLOCK_CTRL_REG
SOFT_REQ_REG
COUNTER_32_FIQ_REG
RESERVED
STATUS_REQ_REG
PLL_DIV_REG
RESERVED_48
ULPD_PLL_CTRL_STATUS
POWER_CTRL_REG
STATUS_REQ_REG2
SLEEP_STATUS
SETUP_ANALOG_CELL4_ULPD1_REG
SETUP_ANALOG_CELL5_ULPD1_REG
SETUP_ANLOG_CELL6_ULPD1_REG
SOFT_DISABLE_REQ_REG
RESET_STATUS
REVISION_NUMBER
SDW_CLK_DIV_CTRL_SEL
COM_CLK_DIV_CTRL_SEL
CAM_CLK_CTRL
SOFT_REQ_REG2
SPRU753A
Base Address = 0xFFFE 0800
Description
Setup analog cell2 ULPD1
Setup analog cell1 ULPD1
Clock control
Software request
Counter 32 FIQ
Reserved
Status request
PLL division
Reserved 48
ULPD PLL control status
Power control
Status request 2
Sleep status
Setup analog cell4 ULPD1
Setup analog cell5 ULPD1
Setup analog cell6 ULPD1
Software disable request
Reset status
Revision number
SDW clock divider control select
COM clock divider control select
CAM clock control
Software request 2
Ultralow-Power Device
R/W
Power Management
Offset
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
0x60
0x64
0x68
0x6C
0x70
0x74
0x78
0x7C
0x80
51