Texas Instruments OMAP5912 Reference Manual page 644

GDMA Handlers
Table 5. Functional Multiplexing MPU DMA C Register
(FUNC_MUX_MPU_DMA_C) (Continued)
Bit Name
17:12 CONF_ARM_DMA_REQ_13
11:6 CONF_ARM_DMA_REQ_12
5:0 CONF_ARM_DMA_REQ_11
Table 6. Functional Multiplexing MPU DMA D Register(FUNC_MUX_MPU_DMA_D)
Bit Name
31:30 RESERVED
29:24 CONF_ARM_DMA_REQ_20
23:18 CONF_ARM_DMA_REQ_19
17:12 CONF_ARM_DMA_REQ_18
11:6 CONF_ARM_DMA_REQ_17
5:0 CONF_ARM_DMA_REQ_16
20 Direct Memory Access (DMA) Support
Function
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(13). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(12). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(11). n is between 0 and 55.
Base Address = 0xFFFE 1000, Offset Address = 0xF8
Function
Reserved.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(20). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(19). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(18). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(17). n is between 0 and 55.
Writing value n in this register maps DMA
request source n+1 to system DMA controller
DMA_REQ(16). n is between 0 and 55.
R/W Reset
R/W 0x0C
R/W 0x0B
R/W 0x0A
R/W Reset
R/W 0x0
R/W 0x13
R/W 0x12
R/W 0x11
R/W 0x10
R/W 0x0F
SPRU755B