Texas Instruments OMAP5912 Reference Manual page 835

512
1024
Figure 5. Erase Operation
Bit 6 is the ready/busy bit.
Bit 0 indicates that erase
operation has been
succesfully done.
2.1.5 Multiplane Block Erase Operation
SPRU756A
00000000 000000-A25-A24
00000000 00000-A26-A24
Start erase
Write (erase block address), NND_ADDR_SRC
Write 0x60, NND_COMMAND
Write 0xD0, NND_COMMAND_SEC
Write 0x70, NND_COMMAND_SEC
Status = read NND_ACCESS
bit 6 = 1 ?
bit 0 = 1 ?
End erase
The multiplane block erase operation is identical to the multiplane page
program. Up to four blocks, one from each plane, can be simultaneously
erased. Standard block erase command sequences are repeated up to four
times for erasing. Only one block must be selected from each plane. The NFC
does not check the validity of these erase addresses (see Figure 6).
The erase confirm command (0xD0) initiates the erasing process and R/B_
goes low for T time (typically 2 ms). The completion is detected by testing
bers
A23-A17-0
A23-A17-0
NO
YES
YES
NO
Memory Interfaces for the EMIFS
A16-A9
A16-A9
Writing to this register, also sends
the address to the flash core.
This reads the status register
of the flash core.
Flash core is busy erasing
the block.
Erase error
Memory Interfaces 29