Texas Instruments OMAP5912 Reference Manual page 851

Figure 15. Single-Page Program in Postwrite Mode
Software programs the address.
Software program the program command.
Software programs the NND_FIFOCTRL register
(FIFO_SIZE and BLOCK_COUNT field).
Software enables events if needed.
Software enables postwrite.
FIFO empty
(n)
Software writes the data in the FIFO.
When FIFO is full, counter is decremented.
Note: ECC not
Interrupt is cleared by software.
represented.
2.1.15 DMA Support
2.1.16 Host Mode
Read Operation
SPRU756A
N.F.C writes the data to N.F.M.C and empties
the FIFO.
When FIFO is empty, interrupt is asserted low.
(n) (n)
(n)
The NFC supports DMA read and write on one page in the host and FIFO
prefetch and postwrite) mode.
The DMA request is asserted low after the latency time necessary for the
NFMC to transfer data from the memory cell to its internal register.
Ready/Busy_ goes low and transitions to high to indicate data ready. By writing
to the ResetDMASynchro of the NND_RESET register, the DMA request is
asserted high (see Figure 16).
Memory Interfaces for the EMIFS
Host sends "end
program"
command.
(n)
(n)
Last write as counter = 0.
Host can check
the status.
Ready/busy_
Flintn
Memory Interfaces 45