Texas Instruments OMAP5912 Reference Manual page 740

System DMA
DMA LCD Top Address B1 Registers
Table 78. DMA LCD Top Address B1 L Register (TOP_B1_L)
Bit Name
15:1
0
Table 79. DMA LCD Top Address B1 U Register (TOP_B1_U)
Bit Name
15:0
DMA LCD Bottom Address B1 Registers
Table 80. DMA LCD Bottom Address B1 L Register (BOT_B1_L)
Bit Name
15:1
0
116 Direct Memory Access (DMA) Support
The LCD top address B1 registers are two 16-bit registers, which contain the
start address for the video RAM buffer 1. The 32-bit address is obtained by the
concatenation of the two word16 as described here:
LCD_TOP_B1 = DMA_LCD_TOP_B1_U & DMA_LCD_TOP_B1_L
Note:
The LSB of the word32 is equal to zero. Address of video buffer must always
be even.
Base Address = 0xFFFE E300, Offset Address = 0xC8
Function
LCD TOP address for block buffer 1 lower bits
0 (always tied to 0)
Base Address = 0xFFFE E300, Offset Address = 0xCA
Function
LCD TOP address for block buffer 1 upper bits
The LCD bottom address B1 registers are two 16-bit registers that contain the
bottom address for the video RAM buffer 1. The 32-bit address is obtained by
the concatenation of the two word16 as described here:
LCD_BOTTOM_B1 = DMA_LCD_BOT_B1_U & DMA_LCD_BOT_B1_L
Note:
The LSB of the word32 is equal to zero. Address of video buffer must always
be even.
Base Address = 0xFFFE E300, Offset Address = 0xCC
Function
LCD BOT address for block buffer 1 lower bits
0 (always tied to 0)
R/W Reset
R/W ND
R 0
R/W Reset
R/W ND
R/W Reset
R/W ND
R 0
SPRU755B