Table of Contents
Advertisement
OCP Interconnect
3.2
Module Features
3.3
1x OCP Slave Port
3.4
1/2x OCP Slave Port
40
Peripheral Interconnects
The OCP interconnect arbiter provides the following features:
-
One OCP master port 32-bit width, 1x balanced clock, 4x32
(FOUR-TWO-TWO-LAST incremented burst only) nonsplit burst and
nonburst accesses (OMAP OCP_I interconnect)
-
One OCP slave port 32-bit width, 1x balanced clock, 4x32 split burst and
nonburst accesses (GDD OCP_I interconnect)
-
One OCP slave port 32-bit width, 1/2x balanced clock, 4x32 split burst and
nonburst accesses (USB_OTG OCP_I interconnect)
-
Translate split burst to nonsplit burst accesses for OMAP OCP_I slave
interface (buffer for burst transaction)
-
Offer high priority to OCP_I 1x master (GDD OCP_I has the priority)
-
Address space decoding for GDD/SSI and standard error report to the
OCP_T2 OMAP port when address is out of GDD/SSI address space.
The OCP interconnect arbiter 1x OCP slave port has the following features:
-
OCP interface (slave)
-
Synchronous
-
Balanced 100-MHz clock
-
32-bit data width only
-
Support 4x32 burst and nonburst accesses
This port is directly connected to the GDD memory port.
The OCP interconnect arbiter 1/2x OCP slave port has the following features:
-
OCP interface (slave)
-
Synchronous
-
Balanced 100-MHz clock using a 50-MHz phase indication
-
32-bit data width only
-
Support 4x32 burst and nonburst accesses
This port is directly connected to the USB_OTG OCP master interface.
SPRU758A
Advertisement
Chapters
Table of Contents
