Texas Instruments OMAP5912 Reference Manual page 582

Ultralow-Power Device
Table 34. Reset Status Register (RESET_STATUS) (Continued)
Bit Name
2 Security Violation
1 Secure watchdog
time-out
0 POWER_ON_RESET
Note: This register is reset by
Table 35. Revision Number Register (REVISION_NUMBER)
Bit Name
15:8 UNUSED
7:0 REVISION_NUMBER
Note: The 4 LSBs indicate a minor revision, and the 4 MSBs indicate a major revision.
64 Power Management
Base Address = 0xFFFE 0800, Offset = 0x6C
Function
Whenever a security violation event occurs, this bit is
asserted.The user clears this bit by writing a 0.
TIPB reset has no effect on this bit.
0: Security violation has not occurred since last
PWRON_RESET (or user has cleared this bit).
1: Security violation has occurred since last
PWRON_RESET (and since last time user has cleared this
bit).
Whenever a secure watchdog time-out event occurs, this
bit is asserted.The user clears this bit by writing a 0.
TIPB reset has no effect on this bit.
0: Secure watchdog time-out has not occurred since last
PWRON_RESET (or user has cleared this bit).
1: Secure watchdog time-out has occurred since last
PWRON_RESET (and since last time user has cleared this
bit).
Whenever a PWRON_RESET reset occurs, this bit is
asserted.The user clears this bit by writing a 0
TIPB reset has no effect on this bit.
0: PWRON_RESET not reset (or user has cleared this bit)
1: PWRON_RESET reset
PWRON_RESET
and not by the TIPB reset.
Base Address = 0xFFFE 0800, Offset = 0x70
Function
Unused
Indicates the revision number of the ULPD.
The revision number must be read as
follows.
[7..4].[3..0]. For example, 0x14 must be read
like 1.4 revision.
R/W Reset
R/W 0x0
R/W 0x0
R/W 0x1
R/W Reset
R 0x0
R Unknown
SPRU753A