Texas Instruments OMAP5912 Reference Manual page 1018

Multimedia processor device overview and architecture
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Table 5.
Watchdog Timer Registers (Continued)
Name
WWPS
RESERVED
RESERVED
RESERVED
RESERVED
WSPR
To keep mapping compatibility between 32-bit watchdog and dual-mode timer modules.
Table 6.
Watchdog HW Revision (ID) Register (WIDR)
Bit
Name
31:8
RESERVED
7:0
WD_REV
SPRU759B
Base Address = 0xFFFE B000
Description
Watchdog write pending
Reserved
Reserved
Reserved
Reserved
Watchdog start/stop
Base Address = 0xFFFE B000, Offset = 0x00
Function
Reserved
Module HW revision number indicates the revision
number of the current timer module. This value is
fixed in hardware.
Least significant 4 bits indicate a minor revision.
Most significant 4 bits indicate a major revision.
A reset has no effect on the value returned.
This read-only, 32-bit register (accessible in 16-bit mode) contains the
hardware revision number of the module. A write to this register has no effect.
32-Bit Watchdog Timer General Overview
R/W
R
-
-
-
-
R/W
Offset
0x34
0x38
0x3C
0x40
0x44
0x48
R/W
Reset
R
0x000000
R
0x10
Timers
15

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