Texas Instruments OMAP5912 Reference Manual page 279

Architecture Overview
Figure 1. DSP Subsystem and Modules
Endianism
conversion
EMIF
I-cache
DSP
MMU
DARAM
SARAM
ROM,
SRAM,
PDROM
Traffic
Flash,
controller
SBFlash
SDRAM
On-chip
SARAM
16 DSP Subsystem
DSP subsystem and interfaces
Internal
memory
buses
TMS320C55x
Memory
I/F
Shared
TIPB
bridge
Configuration
DMA
(EMIF)
(DARAM)
(SARAM)
(MPUI)
(TIPB)
MPUI port
Endianism conversion
MPU subsystem
MPUI
System
DMA
DSP private
peripherals
Timer
DSPTM_CK
DSP
(1 INT)
HWA
WD timer
DSPWD_CK
DSP core
(1 INT)
Interrupt
handler
Private
DSP_INTH_CK
TIPB
bridge
Interrupt I/F
DSP_INTH_CK
DSP private peripheral bus
DSP public peripheral bus
Pseudo-
dynamic
MPU public
sharing
peripheral
bus
MPU public
TIPB bridge
MPU
MPU/DSP shared
peripherals
Mailbox
MPU/DSP static
shared
8 x GPTIMERS
SPI
UART1,2,3
I 2 C
MMCSDIO2
McBSP2
MPU/DSP
Dynamic shared
GPIO1,2,3,4
32-kHz synchro
counter
16
16
DSP public
peripherals
McBSP1 (Audio PCM)
I2S via McBSP
DSPXOR_CK
2 INT, 2DMA
McBSP3 (optical)
(McBSP)
DSPXOR_CK
2 INT, 2DMA
MCSI2
(MCSI)
DSPXOR_CK
2 INT
MCSI1(Bluetooth voice)
(MCSI)
DSPXOR_CK
2 INT
SPRU750A