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Memory Interfaces for the EMIFS
Figure 13.
Invalid Block Mapping
Store block
address in the
invalid block
table
Increment BLOCK address in
NND_ADDR_SRC register.
40
Memory Interfaces
Start invalid block table
Write 0x00000005h, NND_ADDR_SRC
Write 50h, NND_COMMAND
Wait for t r time
Read data, NND_ACCESS
NO
Data = 0xFF ?
YES
Write 0x00000205h, NND_ADDR_SRC
Write 50h, NND_COMMAND
Wait for time
Read data, NND_ACCESS
NO
Data = 0xFF ?
YES
NO
Last block ?
YES
End invalid block table
To access 6th
byte of the spare
area of page 0.
Writing to this register, also sends
the address to the flash core.
There is a latency after the
address is sent, for the
data to be ready. This can
be done with an interrupt or
polling the R/B.
To access 6th
byte of the spare
area of page 1.
Writing to this register, sends also
the address to the flash core.
There is a latency after the
address is sent, for the
data to be ready. This can
be done with an interrupt or
polling the R/B.
SPRU756A
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